netdev - Re: [PATCH 2/3] dt-bindings: net: Document GBETH bindings for Renesas RZ/V2H(P) SoC

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Message-ID: <a1dbb3e8-4a52-4cc2-8e7b-cf240f726d5e@lunn.ch>
Date: Sun, 2 Mar 2025 20:10:26 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	"Russell King (Oracle)" <rmk+kernel@...linux.org.uk>,
	Giuseppe Cavallaro <peppe.cavallaro@...com>,
	Jose Abreu <joabreu@...opsys.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	netdev@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
	Biju Das <biju.das.jz@...renesas.com>,
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 2/3] dt-bindings: net: Document GBETH bindings for
 Renesas RZ/V2H(P) SoC

> +  interrupts:
> +    items:
> +      - description: Subsystem interrupt
> +      - description: The interrupt to manage the remote wake-up packet detection
> +      - description: The interrupt that occurs when Tx/Rx enters/exits the LPI state
> +      - description: Per-channel transmission-0 completion interrupt
> +      - description: Per-channel transmission-1 completion interrupt
> +      - description: Per-channel transmission-2 completion interrupt
> +      - description: Per-channel transmission-3 completion interrupt
> +      - description: Per-channel receive-0 completion interrupt
> +      - description: Per-channel receive-1 completion interrupt
> +      - description: Per-channel receive-2 completion interrupt
> +      - description: Per-channel receive-3 completion interrupt
> +
> +  interrupt-names:
> +    items:
> +      - const: macirq
> +      - const: eth_wake_irq
> +      - const: eth_lpi
> +      - const: tx0
> +      - const: tx1
> +      - const: tx2
> +      - const: tx3
> +      - const: rx0
> +      - const: rx1
> +      - const: rx2
> +      - const: rx3

There has already been a discussion about trying to make the clock
names more uniform. But what about interrupts? Which of these are in
the IP databook? What names does the databook use for these
interrupts?

	Andrew