netdev - [PATCH 2/2] dt-bindings: net: add enc28j60's irq-gpios node description and binding example

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Message-ID: <tencent_8031D017AFE5E266C43F62C916C709009E06@qq.com>
Date: Sun,  9 Mar 2025 15:48:38 +0800
From: Hanyuan Zhao <hanyuan-z@...com>
To: davem@...emloft.net,
	kuba@...nel.org,
	andrew+netdev@...n.ch,
	edumazet@...gle.com,
	pabeni@...hat.com
Cc: netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Hanyuan Zhao <hanyuan-z@...com>
Subject: [PATCH 2/2] dt-bindings: net: add enc28j60's irq-gpios node description and binding example

This patch allows the kernel to automatically requests the pin, configures
it as an input, and converts it to an IRQ number, according to a GPIO
phandle specified in device tree. This simplifies the process by
eliminating the need to manually define pinctrl and interrupt nodes.
Additionally, it is necessary for platforms that do not support pin
configuration and properties via the device tree.

Signed-off-by: Hanyuan Zhao <hanyuan-z@...com>
---
 .../bindings/net/microchip,enc28j60.txt       | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/microchip,enc28j60.txt b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt
index a8275921a896..e6423635e55b 100644
--- a/Documentation/devicetree/bindings/net/microchip,enc28j60.txt
+++ b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt
@@ -8,6 +8,8 @@ the SPI master node.
 Required properties:
 - compatible: Should be "microchip,enc28j60"
 - reg: Specify the SPI chip select the ENC28J60 is wired to
+
+Required interrupt properties with pin control subsystem:
 - interrupts: Specify the interrupt index within the interrupt controller (referred
               to above in interrupt-parent) and interrupt type. The ENC28J60 natively
               generates falling edge interrupts, however, additional board logic
@@ -17,6 +19,14 @@ Required properties:
              see also generic and your platform specific pinctrl binding
              documentation.
 
+Required interrupt properties with a single GPIO phandle:
+- irq-gpios: Specify the GPIO pin used as the interrupt line. When this property is
+             set, the kernel automatically requests the pin, configures it as an input,
+             and converts it to an IRQ number. This simplifies the process by
+             eliminating the need to manually define pinctrl and interrupt nodes.
+             Additionally, it is necessary for platforms that do not support pin
+             configuration and properties via the device tree.
+
 Optional properties:
 - spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.
   According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,
@@ -54,3 +64,17 @@ Example (for NXP i.MX28 with pin control stuff for GPIO irq):
                         fsl,pull-up = <MXS_PULL_DISABLE>;
                 };
         };
+
+Example (if can not configure pin properties via the device tree):
+
+        &spi2 {
+                status = "okay";
+                cs-gpios = <&porta 23 GPIO_ACTIVE_LOW>;
+
+                enc28j60: ethernet@1 {
+                        compatible = "microchip,enc28j60";
+                        reg = <0>;
+                        spi-max-frequency = <12000000>;
+                        irq-gpios = <&porta 24 GPIO_ACTIVE_HIGH>;
+                };
+        };
-- 
2.43.0