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Message-Id: <E1trIAF-005ntc-S5@rmk-PC.armlinux.org.uk>
Date: Sun, 09 Mar 2025 15:02:03 +0000
From: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>
To: Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>
Cc: Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Andrew Lunn <andrew+netdev@...n.ch>,
Conor Dooley <conor+dt@...nel.org>,
Conor Dooley <conor@...nel.org>,
"David S. Miller" <davem@...emloft.net>,
devicetree@...r.kernel.org,
Emil Renner Berthing <kernel@...il.dk>,
Eric Dumazet <edumazet@...gle.com>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
Jakub Kicinski <kuba@...nel.org>,
Jose Abreu <joabreu@...opsys.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-riscv@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Minda Chen <minda.chen@...rfivetech.com>,
netdev@...r.kernel.org,
Palmer Dabbelt <palmer@...belt.com>,
Paolo Abeni <pabeni@...hat.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh@...nel.org>,
Samin Guo <samin.guo@...rfivetech.com>
Subject: [PATCH net-next 4/7] riscv: dts: starfive: remove
"snps,en-tx-lpi-clockgating" property
Whether the MII transmit clock can be stopped is primarily a property
of the PHY (there is a capability bit that should be checked first.)
Whether the MAC is capable of stopping the transmit clock is a separate
issue, but this is already handled by the core DesignWare MAC code.
As commit "net: stmmac: starfive: use PHY capability for TX clock stop"
adds the flag to use the PHY capability, remove the DT property that is
now unecessary.
Cc: Samin Guo <samin.guo@...rfivetech.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 0d8339357bad..a7aed4a21b65 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -1022,7 +1022,6 @@ gmac0: ethernet@...30000 {
snps,force_thresh_dma_mode;
snps,axi-config = <&stmmac_axi_setup>;
snps,tso;
- snps,en-tx-lpi-clockgating;
snps,txpbl = <16>;
snps,rxpbl = <16>;
starfive,syscon = <&aon_syscon 0xc 0x12>;
@@ -1053,7 +1052,6 @@ gmac1: ethernet@...40000 {
snps,force_thresh_dma_mode;
snps,axi-config = <&stmmac_axi_setup>;
snps,tso;
- snps,en-tx-lpi-clockgating;
snps,txpbl = <16>;
snps,rxpbl = <16>;
starfive,syscon = <&sys_syscon 0x90 0x2>;
--
2.30.2
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