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Message-ID: <674f5050-1d87-45bc-a117-e4bf233d7045@lunn.ch>
Date: Sat, 5 Apr 2025 22:53:55 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Alexander Duyck <alexander.duyck@...il.com>
Cc: "Russell King (Oracle)" <linux@...linux.org.uk>,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
netdev@...r.kernel.org, hkallweit1@...il.com, davem@...emloft.net,
kuba@...nel.org, pabeni@...hat.com
Subject: Re: [net PATCH 1/2] net: phy: Cleanup handling of recent changes to
phy_lookup_setting
> So the ugly bit for us is that there are no MII interfaces to the PCS
> or PMA. It is all MMIO accesses a register map and a number of signals
> were just routed to registers in another section of the part for us to
> read to or write from.
The API is pretty forgiving, so you might be able to make it look like
a normal device. You need to implement:
/** @read_c45: Perform a C45 read transfer on the bus */
int (*read_c45)(struct mii_bus *bus, int addr, int devnum, int regnum);
/** @write_c45: Perform a C45 write transfer on the bus */
int (*write_c45)(struct mii_bus *bus, int addr, int devnum,
int regnum, u16 val);
It could be you can implement a lookup table to map (devnum, regnum)
to an MMIO address.
Andrew
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