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Message-ID: <9791f0dd-f7b3-4174-8b52-0e8767f153fa@amd.com>
Date: Mon, 7 Apr 2025 14:59:30 +0100
From: Alejandro Lucero Palau <alucerop@....com>
To: Simon Horman <horms@...nel.org>, alejandro.lucero-palau@....com
Cc: linux-cxl@...r.kernel.org, netdev@...r.kernel.org,
dan.j.williams@...el.com, edward.cree@....com, davem@...emloft.net,
kuba@...nel.org, pabeni@...hat.com, edumazet@...gle.com, dave.jiang@...el.com
Subject: Re: [PATCH v12 02/23] sfc: add cxl support
On 3/31/25 19:31, Simon Horman wrote:
> On Mon, Mar 31, 2025 at 03:45:34PM +0100, alejandro.lucero-palau@....com wrote:
>> From: Alejandro Lucero <alucerop@....com>
>>
>> Add CXL initialization based on new CXL API for accel drivers and make
>> it dependent on kernel CXL configuration.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@....com>
> ...
>
>> diff --git a/drivers/net/ethernet/sfc/efx.c b/drivers/net/ethernet/sfc/efx.c
> ...
>
>> @@ -1214,6 +1218,15 @@ static int efx_pci_probe(struct pci_dev *pci_dev,
>> if (rc)
>> goto fail2;
>>
>> + /* A successful cxl initialization implies a CXL region created to be
>> + * used for PIO buffers. If there is no CXL support, or initialization
>> + * fails, efx_cxl_pio_initialised wll be false and legacy PIO buffers
> nit: will
>
I'll fix it.
Thanks
>> + * defined at specific PCI BAR regions will be used.
>> + */
>> + rc = efx_cxl_init(probe_data);
>> + if (rc)
>> + pci_err(pci_dev, "CXL initialization failed with error %d\n", rc);
>> +
>> rc = efx_pci_probe_post_io(efx);
>> if (rc) {
>> /* On failure, retry once immediately.
> ...
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