netdev - Re: [RESEND net-next v5 1/4] net: phy: realtek: Group RTL82* macro definitions

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Message-ID: <96fcff68-6a96-49fe-b771-629d3bef03ea@lunn.ch>
Date: Tue, 8 Apr 2025 14:17:19 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Joe Damato <jdamato@...tly.com>, Michael Klein <michael@...sekall.de>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [RESEND net-next v5 1/4] net: phy: realtek: Group RTL82* macro
 definitions

On Mon, Apr 07, 2025 at 07:52:50PM -0700, Joe Damato wrote:
> On Mon, Apr 07, 2025 at 08:21:40PM +0200, Michael Klein wrote:
> > Group macro definitions by chip number in lexicographic order.
> > 
> > Signed-off-by: Michael Klein <michael@...sekall.de>
> > ---
> >  drivers/net/phy/realtek/realtek_main.c | 30 +++++++++++++-------------
> >  1 file changed, 15 insertions(+), 15 deletions(-)
> > 
> > diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
> > index 893c82479671..b27c0f995e56 100644
> > --- a/drivers/net/phy/realtek/realtek_main.c
> > +++ b/drivers/net/phy/realtek/realtek_main.c
> > @@ -17,6 +17,15 @@
> >  
> >  #include "realtek.h"
> >  
> > +#define RTL8201F_ISR				0x1e
> > +#define RTL8201F_ISR_ANERR			BIT(15)
> > +#define RTL8201F_ISR_DUPLEX			BIT(13)
> > +#define RTL8201F_ISR_LINK			BIT(11)
> > +#define RTL8201F_ISR_MASK			(RTL8201F_ISR_ANERR | \
> > +						 RTL8201F_ISR_DUPLEX | \
> > +						 RTL8201F_ISR_LINK)
> > +#define RTL8201F_IER				0x13
> 
> If sorting lexicographically, wouldn't RTL8201F_IER come before
> RTL8201F_ISR ?

The change log says "chip_number" lexicographic order. RTL8201F is the
chip number, ISR is the register name.

You would normally sub sort register number, so i would of put
IER=0x13 before ISR=0x1e, within RTL8201F.

> 
> >  #define RTL821x_PHYSR				0x11
> >  #define RTL821x_PHYSR_DUPLEX			BIT(13)
> >  #define RTL821x_PHYSR_SPEED			GENMASK(15, 14)
> > @@ -31,6 +40,10 @@
> >  #define RTL821x_EXT_PAGE_SELECT			0x1e
> >  #define RTL821x_PAGE_SELECT			0x1f
> >  
> > +#define RTL8211E_CTRL_DELAY			BIT(13)
> > +#define RTL8211E_TX_DELAY			BIT(12)
> > +#define RTL8211E_RX_DELAY			BIT(11)
> 
> Maybe I'm reading this wrong but these don't seem sorted
> lexicographically ?

This i don't follow, you normally keep register bits next to the
register. This is particularly important when the register bits don't
have the register name embedded within it.

    Andrew

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