netdev - Re: [PATCH v2 iwl-next 01/10] ice: move TSPLL functions to a separate file

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Message-ID: <20250411123627.GB395307@horms.kernel.org>
Date: Fri, 11 Apr 2025 13:36:27 +0100
From: Simon Horman <horms@...nel.org>
To: Karol Kolacinski <karol.kolacinski@...el.com>
Cc: intel-wired-lan@...ts.osuosl.org, netdev@...r.kernel.org,
	anthony.l.nguyen@...el.com, przemyslaw.kitszel@...el.com,
	Michal Kubiak <michal.kubiak@...el.com>,
	Milena Olech <milena.olech@...el.com>
Subject: Re: [PATCH v2 iwl-next 01/10] ice: move TSPLL functions to a
 separate file

On Wed, Apr 09, 2025 at 02:24:58PM +0200, Karol Kolacinski wrote:
> Collect TSPLL related functions and definitions and move them to
> a separate file to have all TSPLL functionality in one place.
> 
> Move CGU related functions and definitions to ice_common.*
> 
> Reviewed-by: Michal Kubiak <michal.kubiak@...el.com>
> Reviewed-by: Milena Olech <milena.olech@...el.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@...el.com>

...

> diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c
> index f7fd0a2451de..190d850f7ff7 100644
> --- a/drivers/net/ethernet/intel/ice/ice_common.c
> +++ b/drivers/net/ethernet/intel/ice/ice_common.c
> @@ -6234,3 +6234,64 @@ u32 ice_get_link_speed(u16 index)
>  
>  	return ice_aq_to_link_speed[index];
>  }
> +
> +/**
> + * ice_read_cgu_reg_e82x - Read a CGU register
> + * @hw: pointer to the HW struct
> + * @addr: Register address to read
> + * @val: storage for register value read
> + *
> + * Read the contents of a register of the Clock Generation Unit. Only
> + * applicable to E822 devices.
> + *
> + * Return: 0 on success, other error codes when failed to read from CGU.
> + */
> +int ice_read_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 *val)
> +{
> +	struct ice_sbq_msg_input cgu_msg = {
> +		.opcode = ice_sbq_msg_rd,
> +		.dest_dev = cgu,

This seems to be addressed in patch v2: when applied against iwl-next,
but not next, this needs to be ice_sbq_dev_cgu.

drivers/net/ethernet/intel/ice/ice_common.c:6253:15: error: use of undeclared identifier 'cgu'
 6253 |                 .dest_dev = cgu,

> +		.msg_addr_low = addr
> +	};
> +	int err;
> +
> +	err = ice_sbq_rw_reg(hw, &cgu_msg, ICE_AQ_FLAG_RD);
> +	if (err) {
> +		dev_dbg(ice_hw_to_dev(hw), "Failed to read CGU register 0x%04x, err %d\n",
> +			addr, err);
> +		return err;
> +	}
> +
> +	*val = cgu_msg.data;
> +
> +	return 0;
> +}
> +
> +/**
> + * ice_write_cgu_reg_e82x - Write a CGU register
> + * @hw: pointer to the HW struct
> + * @addr: Register address to write
> + * @val: value to write into the register
> + *
> + * Write the specified value to a register of the Clock Generation Unit. Only
> + * applicable to E822 devices.
> + *
> + * Return: 0 on success, other error codes when failed to write to CGU.
> + */
> +int ice_write_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 val)
> +{
> +	struct ice_sbq_msg_input cgu_msg = {
> +		.opcode = ice_sbq_msg_wr,
> +		.dest_dev = cgu,

Ditto.

> +		.msg_addr_low = addr,
> +		.data = val
> +	};
> +	int err;
> +
> +	err = ice_sbq_rw_reg(hw, &cgu_msg, ICE_AQ_FLAG_RD);
> +	if (err)
> +		dev_dbg(ice_hw_to_dev(hw), "Failed to write CGU register 0x%04x, err %d\n",
> +			addr, err);
> +
> +	return err;
> +}

...