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Message-ID: <SJ2PR11MB8452F78213CB1A405B1E72C09BBD2@SJ2PR11MB8452.namprd11.prod.outlook.com>
Date: Wed, 16 Apr 2025 13:01:11 +0000
From: "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@...el.com>
To: Jiri Pirko <jiri@...nulli.us>
CC: "donald.hunter@...il.com" <donald.hunter@...il.com>, "kuba@...nel.org"
	<kuba@...nel.org>, "davem@...emloft.net" <davem@...emloft.net>, "Dumazet,
 Eric" <edumazet@...gle.com>, "pabeni@...hat.com" <pabeni@...hat.com>,
	"horms@...nel.org" <horms@...nel.org>, "vadim.fedorenko@...ux.dev"
	<vadim.fedorenko@...ux.dev>, "Nguyen, Anthony L"
	<anthony.l.nguyen@...el.com>, "Kitszel, Przemyslaw"
	<przemyslaw.kitszel@...el.com>, "andrew+netdev@...n.ch"
	<andrew+netdev@...n.ch>, "Loktionov, Aleksandr"
	<aleksandr.loktionov@...el.com>, "netdev@...r.kernel.org"
	<netdev@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "intel-wired-lan@...ts.osuosl.org"
	<intel-wired-lan@...ts.osuosl.org>, "linux-rdma@...r.kernel.org"
	<linux-rdma@...r.kernel.org>
Subject: RE: [PATCH net-next v1 0/3] dpll: add ref-sync pins feature

>From: Jiri Pirko <jiri@...nulli.us>
>Sent: Wednesday, April 16, 2025 10:12 AM
>
>Tue, Apr 15, 2025 at 07:51:12PM +0200, arkadiusz.kubalewski@...el.com
>wrote:
>>Allow to bind two pins and become a single source of clock signal, where
>>first of the pins is carring the base frequency and second provides SYNC
>>pulses.
>
>This is not enough. Could you please provide more details about this.
>Motivation is needed. Also, from the examples below looks like you allow
>to bind 2 pins, in async way. Would make sense to bind more than 2 pins
>together?
>

Sure, will try.

It would be possible to have a single pin to be able to create a reference
sync pair with multiple pins (strictly depends on HW), but only one at the
time can be active. Thus rebinding to a new one shall unbind from previous.

>Honestly, I don't understand what this is about.
>

Most basic explanation would be that this feature is similar to Embedded
Sync feature, where single signal carrier is used to pass both base
frequency and SYNC signal.
With Reference-SYNC two input pins are tied together to create a kind of
Embedded Sync signal (from dpll device perspective), where dpll device is
able to use both higher (base) and lower (SYNC) frequency signals for its
operation.

AFAIK the base frequency signal in this case is used for dpll's loop
bandwidth. The lower (SYNC) frequency is used to actually syntonize to.
This is mainly cost saving as the higher quality XO (i.e. TCXO/OCXO) signal
can be provided externally and board could use low-cost XO.

Will try to include some additional explanations on this for next version.

Thank you!
Arkadiusz

>
>>
>>Verify pins bind state/capabilities:
>>$ ./tools/net/ynl/pyynl/cli.py \
>> --spec Documentation/netlink/specs/dpll.yaml \
>> --do pin-get \
>> --json '{"id":0}'
>>{'board-label': 'CVL-SDP22',
>> 'id': 0,
>> [...]
>> 'reference-sync': [{'id': 1, 'state': 'disconnected'}],
>> [...]}
>>
>>Bind the pins by setting connected state between them:
>>$ ./tools/net/ynl/pyynl/cli.py \
>> --spec Documentation/netlink/specs/dpll.yaml \
>> --do pin-set \
>> --json '{"id":0, "reference-sync":{"id":1, "state":"connected"}}'
>>
>>Verify pins bind state:
>>$ ./tools/net/ynl/pyynl/cli.py \
>> --spec Documentation/netlink/specs/dpll.yaml \
>> --do pin-get \
>> --json '{"id":0}'
>>{'board-label': 'CVL-SDP22',
>> 'id': 0,
>> [...]
>> 'reference-sync': [{'id': 1, 'state': 'connected'}],
>> [...]}
>>
>>Unbind the pins by setting disconnected state between them:
>>$ ./tools/net/ynl/pyynl/cli.py \
>> --spec Documentation/netlink/specs/dpll.yaml \
>> --do pin-set \
>> --json '{"id":0, "reference-sync":{"id":1, "state":"disconnected"}}'
>>
>>
>>Arkadiusz Kubalewski (3):
>>  dpll: add reference-sync netlink attribute
>>  dpll: add reference sync get/set
>>  ice: add ref-sync dpll pins
>>
>> Documentation/netlink/specs/dpll.yaml         |  19 ++
>> drivers/dpll/dpll_core.c                      |  27 +++
>> drivers/dpll/dpll_core.h                      |   1 +
>> drivers/dpll/dpll_netlink.c                   | 188 ++++++++++++++++--
>> drivers/dpll/dpll_nl.c                        |  10 +-
>> drivers/dpll/dpll_nl.h                        |   1 +
>> .../net/ethernet/intel/ice/ice_adminq_cmd.h   |   2 +
>> drivers/net/ethernet/intel/ice/ice_dpll.c     | 186 +++++++++++++++++
>> include/linux/dpll.h                          |  10 +
>> include/uapi/linux/dpll.h                     |   1 +
>> 10 files changed, 425 insertions(+), 20 deletions(-)
>>
>>
>>base-commit: 420aabef3ab5fa743afb4d3d391f03ef0e777ca8
>>--
>>2.38.1
>>


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