netdev - Re: [PATCH 4/5] arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board

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Message-Id: <20250425100005.103807-1-amadeus@jmu.edu.cn>
Date: Fri, 25 Apr 2025 18:00:05 +0800
From: Chukun Pan <amadeus@....edu.cn>
To: dlan@...too.org
Cc: amadeus@....edu.cn,
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Subject: Re: [PATCH 4/5] arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board

Hi,

> > > On Radxa A5E board, the EMAC0 connect to an external YT8531C PHY,
> > > which features a 25MHz crystal, and using PH8 pin as PHY reset.
> > >
> > > Tested on A5E board with schematic V1.20.
> >
> > Although the schematic says it is YT8531C, the PHY on the V1.20 board
> > is Maxio MAE0621A. The article of cnx-software also mentioned this:
>
> IMO, then the schematic should be updated, I could definitely adjust
> the commit message to reflect this change, but don't know if further
> action need to take, like writing a new phy driver, I guess a fallback
> to generic phy just works?

The schematic on the radxa website is still V1.10. [1]
So how did you test it on the A5E board? Both PHYs
on the board (V1.20) are Maxio MAE0621A.

dmesg should show the PHY driver used:
dwmac-sun8i ... eth0: PHY [stmmac-0:01] driver [YT8531 Gigabit Ethernet] (irq=POLL)

[1] https://radxa.com/products/cubie/a5e/#downloads

Thanks,
Chukun

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