netdev - [PATCH iwl-next v1 1/8] igc: move IGC_TXDCTL_QUEUE_ENABLE and IGC_TXDCTL

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Message-Id: <20250428060225.1306986-2-faizal.abdul.rahim@linux.intel.com>
Date: Mon, 28 Apr 2025 02:02:18 -0400
From: Faizal Rahim <faizal.abdul.rahim@...ux.intel.com>
To: Tony Nguyen <anthony.l.nguyen@...el.com>,
	Przemek Kitszel <przemyslaw.kitszel@...el.com>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	"David S . Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>,
	Paolo Abeni <pabeni@...hat.com>,
	Vladimir Oltean <vladimir.oltean@....com>
Cc: intel-wired-lan@...ts.osuosl.org,
	netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Faizal Rahim <faizal.abdul.rahim@...ux.intel.com>,
	Chwee-Lin Choong <chwee.lin.choong@...el.com>
Subject: [PATCH iwl-next v1 1/8] igc: move IGC_TXDCTL_QUEUE_ENABLE and IGC_TXDCTL_SWFLUSH

Consolidate TXDCTL-related macros for better organization and readability.

Signed-off-by: Faizal Rahim <faizal.abdul.rahim@...ux.intel.com>
---
 drivers/net/ethernet/intel/igc/igc.h      | 6 ++++++
 drivers/net/ethernet/intel/igc/igc_base.h | 4 ----
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h
index 859a15e4ccba..e9d180eac015 100644
--- a/drivers/net/ethernet/intel/igc/igc.h
+++ b/drivers/net/ethernet/intel/igc/igc.h
@@ -492,6 +492,12 @@ static inline u32 igc_rss_type(const union igc_adv_rx_desc *rx_desc)
 #define IGC_RX_WTHRESH			4
 #define IGC_TX_WTHRESH			16
 
+/* Additional Transmit Descriptor Control definitions */
+/* Ena specific Tx Queue */
+#define IGC_TXDCTL_QUEUE_ENABLE	0x02000000
+/* Transmit Software Flush */
+#define IGC_TXDCTL_SWFLUSH	0x04000000
+
 #define IGC_RX_DMA_ATTR \
 	(DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
 
diff --git a/drivers/net/ethernet/intel/igc/igc_base.h b/drivers/net/ethernet/intel/igc/igc_base.h
index 6320eabb72fe..4a56c634977b 100644
--- a/drivers/net/ethernet/intel/igc/igc_base.h
+++ b/drivers/net/ethernet/intel/igc/igc_base.h
@@ -86,10 +86,6 @@ union igc_adv_rx_desc {
 	} wb;  /* writeback */
 };
 
-/* Additional Transmit Descriptor Control definitions */
-#define IGC_TXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Tx Queue */
-#define IGC_TXDCTL_SWFLUSH	0x04000000 /* Transmit Software Flush */
-
 /* Additional Receive Descriptor Control definitions */
 #define IGC_RXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Rx Queue */
 #define IGC_RXDCTL_SWFLUSH		0x04000000 /* Receive Software Flush */
-- 
2.34.1