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Message-Id: <20250430-kk-tspll-improvements-alignment-v3-9-ab8472e86204@intel.com>
Date: Wed, 30 Apr 2025 15:51:40 -0700
From: Jacob Keller <jacob.e.keller@...el.com>
To: Anthony Nguyen <anthony.l.nguyen@...el.com>,
netdev <netdev@...r.kernel.org>,
Intel Wired LAN <intel-wired-lan@...ts.osuosl.org>
Cc: Jacob Keller <jacob.e.keller@...el.com>,
Przemek Kitszel <przemyslaw.kitszel@...el.com>,
Aleksandr Loktionov <aleksandr.loktionov@...el.com>,
Milena Olech <milena.olech@...el.com>,
Michal Kubiak <michal.kubiak@...el.com>,
Karol Kolacinski <karol.kolacinski@...el.com>
Subject: [PATCH v3 09/15] ice: read TSPLL registers again before reporting
status
After programming the TSPLL, re-read the registers before reporting status.
This ensures the debug log message will show what was actually programmed,
rather than relying on a cached value.
Signed-off-by: Jacob Keller <jacob.e.keller@...el.com>
---
drivers/net/ethernet/intel/ice/ice_tspll.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c b/drivers/net/ethernet/intel/ice/ice_tspll.c
index f44a27252f384dbb9a1f57d5f9ac03b3b7adf037..e7bca0957583b7ba16498148b0afca0de3467e85 100644
--- a/drivers/net/ethernet/intel/ice/ice_tspll.c
+++ b/drivers/net/ethernet/intel/ice/ice_tspll.c
@@ -201,8 +201,11 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
return -EBUSY;
}
- ice_tspll_log_cfg(hw, dw24.ts_pll_enable, clk_src, clk_freq, true,
- true);
+ ICE_READ_CGU_REG_OR_DIE(hw, ICE_CGU_R9, &dw9.val);
+ ICE_READ_CGU_REG_OR_DIE(hw, ICE_CGU_R24, &dw24.val);
+
+ ice_tspll_log_cfg(hw, dw24.ts_pll_enable, dw24.time_ref_sel,
+ dw9.time_ref_freq_sel, true, false);
return 0;
}
@@ -343,8 +346,11 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
return -EBUSY;
}
- ice_tspll_log_cfg(hw, dw23.ts_pll_enable, clk_src, clk_freq, true,
- true);
+ ICE_READ_CGU_REG_OR_DIE(hw, ICE_CGU_R9, &dw9.val);
+ ICE_READ_CGU_REG_OR_DIE(hw, ICE_CGU_R23, &dw23.val);
+
+ ice_tspll_log_cfg(hw, dw23.ts_pll_enable, dw23.time_ref_sel,
+ dw9.time_ref_freq_sel, true, true);
return 0;
}
--
2.48.1.397.gec9d649cc640
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