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Message-ID: <aCMDhyuY2_B-c0CE@59cc1f87bccd>
Date: Tue, 13 May 2025 08:32:07 +0000
From: Subbaraya Sundeep <sbhatta@...vell.com>
To: Simon Horman <horms@...nel.org>
CC: <andrew+netdev@...n.ch>, <davem@...emloft.net>, <edumazet@...gle.com>,
        <kuba@...nel.org>, <pabeni@...hat.com>, <gakula@...vell.com>,
        <hkelam@...vell.com>, <sgoutham@...vell.com>, <lcherian@...vell.com>,
        <bbhushan2@...vell.com>, <jerinj@...vell.com>,
        <netdev@...r.kernel.org>
Subject: Re: [net-next v2 PATCH 2/2] octeontx2-pf: macsec: Get MACSEC
 capability flag from AF

Hi Simon,

On 2025-05-12 at 16:37:32, Simon Horman (horms@...nel.org) wrote:
> On Sun, May 11, 2025 at 06:52:47PM +0530, Subbaraya Sundeep wrote:
> > The presence of MACSEC block is currently figured out based
> > on the running silicon variant. This may not be correct all
> > the times since the MACSEC block can be fused out. Hence get
> > the macsec info from AF via mailbox.
> > 
> > Signed-off-by: Subbaraya Sundeep <sbhatta@...vell.com>
> 
> ...
> 
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> > index 7e3ddb0..7d0e39d 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h
> > @@ -631,9 +631,6 @@ static inline void otx2_setup_dev_hw_settings(struct otx2_nic *pfvf)
> >  		__set_bit(CN10K_PTP_ONESTEP, &hw->cap_flag);
> >  		__set_bit(QOS_CIR_PIR_SUPPORT, &hw->cap_flag);
> >  	}
> > -
> > -	if (is_dev_cn10kb(pfvf->pdev))
> > -		__set_bit(CN10K_HW_MACSEC, &hw->cap_flag);
> >  }
> >  
> >  /* Register read/write APIs */
> > @@ -1043,6 +1040,7 @@ void otx2_disable_napi(struct otx2_nic *pf);
> >  irqreturn_t otx2_cq_intr_handler(int irq, void *cq_irq);
> >  int otx2_rq_init(struct otx2_nic *pfvf, u16 qidx, u16 lpb_aura);
> >  int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx);
> > +int otx2_set_hw_capabilities(struct otx2_nic *pfvf);
> >  
> >  /* RSS configuration APIs*/
> >  int otx2_rss_init(struct otx2_nic *pfvf);
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> > index 0aee8e3..a8ad4a2 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c
> > @@ -3126,6 +3126,8 @@ static int otx2_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> >  	if (err)
> >  		goto err_ptp_destroy;
> >  
> > +	otx2_set_hw_capabilities(pf);
> > +
> >  	err = cn10k_mcs_init(pf);
> >  	if (err)
> >  		goto err_del_mcam_entries;
> 
> Hi Subbaraya,
> 
> If I read things correctly otx2_setup_dev_hw_settings() is called
> for both representors and non-representors, while otx2_probe is
> only called for non-representors.
> 
> If so, my question is if this patch changes behaviour for representors.
> And, again if so, if that is intentional.
I assume you mean VF driver for representors and PF driver for
non-representor. Yes this is intentional. We currently do not support
macscec offload on VFs hence I changed only PF driver. In case we want
to support macsec offload on VFs too then otx2vf_probe also need to be
changed like:
otx2_set_hw_capabilities(vf);
err = cn10k_mcs_init(vf);

Thanks,
Sundeep

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