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Message-ID: <20250516094445.GL1898636@horms.kernel.org>
Date: Fri, 16 May 2025 10:44:45 +0100
From: Simon Horman <horms@...nel.org>
To: Faizal Rahim <faizal.abdul.rahim@...ux.intel.com>
Cc: Tony Nguyen <anthony.l.nguyen@...el.com>,
Przemek Kitszel <przemyslaw.kitszel@...el.com>,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Vladimir Oltean <vladimir.oltean@....com>,
intel-wired-lan@...ts.osuosl.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org,
Aleksandr Loktionov <aleksandr.loktionov@...el.com>,
Chwee-Lin Choong <chwee.lin.choong@...el.com>
Subject: Re: [PATCH iwl-next v2 4/8] igc: assign highest TX queue number as
highest priority in mqprio
On Wed, May 14, 2025 at 12:29:41AM -0400, Faizal Rahim wrote:
> Previously, TX arbitration prioritized queues based on the TC they were
> mapped to. A queue mapped to TC 3 had higher priority than one mapped to
> TC 0.
>
> To improve code reuse for upcoming patches and align with typical NIC
> behavior, this patch updates the logic to prioritize higher queue numbers
> when mqprio is used. As a result, queue 0 becomes the lowest priority and
> queue 3 becomes the highest.
>
> This patch also introduces igc_tsn_is_tc_to_queue_priority_ordered() to
> preserve the original TC-based priority rule and reject configurations
> where a higher TC maps to a lower queue offset.
>
> Signed-off-by: Faizal Rahim <faizal.abdul.rahim@...ux.intel.com>
Reviewed-by: Simon Horman <horms@...nel.org>
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