netdev - [PATCH iwl-next 0/4] ice: Read Tx timestamps in the IRQ top half

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Message-ID: <20250520110823.1937981-6-karol.kolacinski@intel.com>
Date: Tue, 20 May 2025 13:06:25 +0200
From: Karol Kolacinski <karol.kolacinski@...el.com>
To: intel-wired-lan@...ts.osuosl.org
Cc: netdev@...r.kernel.org,
	anthony.l.nguyen@...el.com,
	przemyslaw.kitszel@...el.com,
	richardcochran@...il.com,
	Karol Kolacinski <karol.kolacinski@...el.com>
Subject: [PATCH iwl-next 0/4] ice: Read Tx timestamps in the IRQ top half

On all E82X products (E822, E823 and E825), Tx timestamps are read using
sideband queue.
This is a very robust HW queue and it's used only for accessing PHYs and
CGU, which means it can use spin_locks and delays instead of mutexes and
sleeps like slow admin queue handled by the FW.

This allows reading the sideband queue in the top half of the interrupt
and allows to avoid bottom half scheduling delays, which speeds up Tx
timestamping process significantly.

Introduce new structure ice_sq_ops, which allows to assign lock/unlock
operations based on the queue type on queue init.

Karol Kolacinski (4):
  ice: skip completion for sideband queue writes
  ice: refactor ice_sq_send_cmd and ice_shutdown_sq
  ice: use spin_lock for sideband queue send queue
  ice: read Tx timestamps in the IRQ top half

 drivers/net/ethernet/intel/ice/ice_common.c   |  21 +-
 drivers/net/ethernet/intel/ice/ice_common.h   |   3 +-
 drivers/net/ethernet/intel/ice/ice_controlq.c | 252 +++++++++++-------
 drivers/net/ethernet/intel/ice/ice_controlq.h |  20 +-
 drivers/net/ethernet/intel/ice/ice_ptp.c      |  46 ++--
 drivers/net/ethernet/intel/ice/ice_ptp_hw.c   |  62 +++--
 drivers/net/ethernet/intel/ice/ice_sbq_cmd.h  |   5 +-
 7 files changed, 251 insertions(+), 158 deletions(-)

base-commit: 82bb0098b73f72a026b4bb49206a8c1d90974edc
-- 
2.49.0