netdev - Re: [PATCH] net: dwmac-sun8i: Use parsed internal PHY address instead of 1

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Message-ID: <aCw5LAx1Nmfxk8Y4@Red>
Date: Tue, 20 May 2025 10:11:24 +0200
From: Corentin Labbe <clabbe.montjoie@...il.com>
To: Paul Kocialkowski <paulk@...-base.io>
Cc: netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
	Andrew Lunn <andrew+netdev@...n.ch>,
	"David S . Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Chen-Yu Tsai <wens@...e.org>,
	Jernej Skrabec <jernej.skrabec@...il.com>,
	Samuel Holland <samuel@...lland.org>
Subject: Re: [PATCH] net: dwmac-sun8i: Use parsed internal PHY address
 instead of 1

Le Mon, May 19, 2025 at 06:49:36PM +0200, Paul Kocialkowski a écrit :
> While the MDIO address of the internal PHY on Allwinner sun8i chips is
> generally 1, of_mdio_parse_addr is used to cleanly parse the address
> from the device-tree instead of hardcoding it.
> 
> A commit reworking the code ditched the parsed value and hardcoded the
> value 1 instead, which didn't really break anything but is more fragile
> and not future-proof.
> 
> Restore the initial behavior using the parsed address returned from the
> helper.
> 
> Fixes: 634db83b8265 ("net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs")
> Signed-off-by: Paul Kocialkowski <paulk@...-base.io>
> ---
>  drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> index 85723a78793a..6c7e8655a7eb 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
> @@ -964,7 +964,7 @@ static int sun8i_dwmac_set_syscon(struct device *dev,
>  		/* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
>  		 * address. No need to mask it again.
>  		 */
> -		reg |= 1 << H3_EPHY_ADDR_SHIFT;
> +		reg |= ret << H3_EPHY_ADDR_SHIFT;
>  	} else {
>  		/* For SoCs without internal PHY the PHY selection bit should be
>  		 * set to 0 (external PHY).
> -- 
> 2.49.0
> 

Acked-by: Corentin LABBE <clabbe.montjoie@...il.com>
Tested-by: Corentin LABBE <clabbe.montjoie@...il.com>
Tested-on: sun50i-h6-orangepi-one-plus
Tested-on: sun8i-h3-orangepi-pc

Thanks
Regards