netdev - Re: [PATCH v16 05/22] cxl: Add function for type2 cxl regs setup

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Message-ID: <d64fad40-20f9-44ff-867a-8caacd70767b@amd.com>
Date: Thu, 22 May 2025 10:52:50 +0100
From: Alejandro Lucero Palau <alucerop@....com>
To: Dan Williams <dan.j.williams@...el.com>, alejandro.lucero-palau@....com,
 linux-cxl@...r.kernel.org, netdev@...r.kernel.org, edward.cree@....com,
 davem@...emloft.net, kuba@...nel.org, pabeni@...hat.com,
 edumazet@...gle.com, dave.jiang@...el.com
Cc: Ben Cheatham <benjamin.cheatham@....com>,
 Jonathan Cameron <Jonathan.Cameron@...wei.com>
Subject: Re: [PATCH v16 05/22] cxl: Add function for type2 cxl regs setup


On 5/21/25 19:28, Dan Williams wrote:
> alejandro.lucero-palau@ wrote:
>> From: Alejandro Lucero <alucerop@....com>
>>
>> Create a new function for a type2 device initialising
>> cxl_dev_state struct regarding cxl regs setup and mapping.
>>
>> Export the capabilities found for checking them against the
>> expected ones by the driver.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@....com>
>> Reviewed-by: Ben Cheatham <benjamin.cheatham@....com>
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
>> ---
>>   drivers/cxl/core/pci.c | 62 ++++++++++++++++++++++++++++++++++++++++++
>>   include/cxl/cxl.h      |  3 ++
>>   2 files changed, 65 insertions(+)
>>
>> diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
>> index e2b6420592de..b05c6e64bfe2 100644
>> --- a/drivers/cxl/core/pci.c
>> +++ b/drivers/cxl/core/pci.c
>> @@ -1095,6 +1095,68 @@ int cxl_pci_setup_regs(struct pci_dev *pdev, enum cxl_regloc_type type,
>>   }
>>   EXPORT_SYMBOL_NS_GPL(cxl_pci_setup_regs, "CXL");
>>   
>> +static int cxl_pci_accel_setup_memdev_regs(struct pci_dev *pdev,
>> +					   struct cxl_dev_state *cxlds,
>> +					   unsigned long *caps)
>> +{
>> +	struct cxl_register_map map;
>> +	int rc;
>> +
>> +	rc = cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_MEMDEV, &map, caps);
>> +	/*
>> +	 * This call can return -ENODEV if regs not found. This is not an error
>> +	 * for Type2 since these regs are not mandatory. If they do exist then
>> +	 * mapping them should not fail. If they should exist, it is with driver
>> +	 * calling cxl_pci_check_caps() where the problem should be found.
>> +	 */
> The driver should know in advance if calling:
>
>      cxl_pci_setup_regs(pdev, CXL_REGLOC_RBI_MEMDEV, &map);
>
> ...will fail. Put that logic where it belongs in the probe function of
> the type-2 driver directly. This helper is not helping, it is just
> obfuscating.


As I said in the previous email, I disagree. The CXL API should be 
handling all this. A client only cares about certain things, let's say 
manageable things like capabilities, without going deep into CXL specs 
about how all that needs to be implemented. This patch introduces a 
function embedding different calls for those innerworkings which should 
only be handled by the CXL core.