netdev - Re: [PATCH net 2/3] net: dsa: b53: fix configuring RGMII delay on bcm63xx

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Message-ID: <CAOiHx==NzwF3mXfkf+mS0AZzb-FTR0SHwG9n0Hw9nRiR4k-z6w@mail.gmail.com>
Date: Fri, 23 May 2025 11:08:55 +0200
From: Jonas Gorski <jonas.gorski@...il.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: Florian Fainelli <florian.fainelli@...adcom.com>, Vladimir Oltean <olteanv@...il.com>, 
	"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, 
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
	Vivien Didelot <vivien.didelot@...il.com>, Álvaro Fernández Rojas <noltari@...il.com>, 
	Florian Fainelli <f.fainelli@...il.com>, netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net 2/3] net: dsa: b53: fix configuring RGMII delay on bcm63xx

On Tue, May 20, 2025 at 2:15 AM Andrew Lunn <andrew@...n.ch> wrote:
>
> > Without this change no mode/port works, since there is always either a
> > 0 ns delay or a 4 ns delay in the rx/tx paths (I assume, I have no
> > equipment to measure).
> >
> > With this change all modes/ports work.
>
> Which is wrong.
>
> > With "rgmii-id" the mac doesn't
> > configure any delays (and the phy does instead), with "rgmii" it's
> > vice versa, so there is always the expected 2 ns delay. Same for rxid
> > and txid.
>
> If you read the description of what these four modes mean, you should
> understand why only one should work. And given the most likely PCB
> design, the only mode that should work is rgmii-id. You would have to
> change the PCB design, to make the other modes work.

Since I also have BCM6368 with a BCM53115 connected to one of the
RGMII ports lying around, I played around with it, and it was
surprisingly hard to make it *not* work. Only if I enabled delay on
*both* sides it stopped working, no delay or delay only on one side
continued working (and I used iperf to try if larger amounts of
traffic break it).

So in way, with BCM6368 enabling no (sampling) delays on its MAC side,
all four modes work. I understand that they shouldn't, but the reality
is that they do. Maybe the switches can auto-detect/adapt to (missing)
delays for a certain amount.

@Florian, do you know if this is expected? And yes, I even added the
RGMII delay workaround (change link speed to force the pll to resync)
to ensure that the delays are applied. Though I guess the way Linux
works it isn't needed, and only when changing delays while the link is
up.

> > The Switch is always integrated into the host SoC, so there is no
> > (r)gmii cpu port to configure. There's basically directly attached DMA
> > to/from the buffers of the cpu port. Not sure if there are even
> > buffers, or if it is a direct to DMA delivery.
>
> That makes it a lot simpler. It always plays the MAC side. So i
> recommend you just hard code it no delay, and let the PHY add the
> delays as needed.

Sure thing. I saw that there are device tree properties that can be
used to explicitly enable delays on the MAC side, so in case we ever
need them we can implement them (e.g. a PHY that can't do delays).

Best regards,
Jonas