netdev - Re: [PATCH net] net: ti: icssg-prueth: Fix swapped TX stats for MII interfaces.

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Message-ID: <c9cd4687-0959-4e1f-8a44-a34b74da43a7@ti.com>
Date: Thu, 29 May 2025 17:53:43 +0530
From: "Malladi, Meghana" <m-malladi@...com>
To: Simon Horman <horms@...nel.org>
CC: <saikrishnag@...vell.com>, <pabeni@...hat.com>, <kuba@...nel.org>,
        <edumazet@...gle.com>, <davem@...emloft.net>, <andrew+netdev@...n.ch>,
        <linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <srk@...com>,
        Vignesh Raghavendra
	<vigneshr@...com>,
        Roger Quadros <rogerq@...nel.org>, <danishanwar@...com>
Subject: Re: [PATCH net] net: ti: icssg-prueth: Fix swapped TX stats for MII
 interfaces.

Hi Simon,

On 5/28/2025 9:42 PM, Simon Horman wrote:
> On Tue, May 27, 2025 at 05:43:25PM +0530, Meghana Malladi wrote:
>> In MII mode, Tx lines are swapped for port0 and port1, which means
>> Tx port0 receives data from PRU1 and the Tx port1 receives data from
>> PRU0. This is an expected hardware behavior and reading the Tx stats
>> needs to be handled accordingly in the driver. Update the driver to
>> read Tx stats from the PRU1 for port0 and PRU0 for port1.
>>
>> Fixes: c1e10d5dc7a1 ("net: ti: icssg-prueth: Add ICSSG Stats")
>> Signed-off-by: Meghana Malladi <m-malladi@...com>
>> ---
>>   drivers/net/ethernet/ti/icssg/icssg_stats.c | 4 ++++
>>   1 file changed, 4 insertions(+)
>>
>> diff --git a/drivers/net/ethernet/ti/icssg/icssg_stats.c b/drivers/net/ethernet/ti/icssg/icssg_stats.c
>> index 6f0edae38ea2..0b77930b2f08 100644
>> --- a/drivers/net/ethernet/ti/icssg/icssg_stats.c
>> +++ b/drivers/net/ethernet/ti/icssg/icssg_stats.c
>> @@ -29,6 +29,10 @@ void emac_update_hardware_stats(struct prueth_emac *emac)
>>   	spin_lock(&prueth->stats_lock);
>>   
>>   	for (i = 0; i < ARRAY_SIZE(icssg_all_miig_stats); i++) {
> 
> Hi Meghana,
> 
> Perhaps it would be nice to include a comment here.
> 

That makes sense, sure will do that.

>> +		if (emac->phy_if == PHY_INTERFACE_MODE_MII &&
>> +		    icssg_all_miig_stats[i].offset >= ICSSG_TX_PACKET_OFFSET &&
>> +		    icssg_all_miig_stats[i].offset <= ICSSG_TX_BYTE_OFFSET)
>> +			base = stats_base[slice ^ 1];
>>   		regmap_read(prueth->miig_rt,
>>   			    base + icssg_all_miig_stats[i].offset,
>>   			    &val);
>>
>> base-commit: 32374234ab0101881e7d0c6a8ef7ebce566c46c9
>> -- 
>> 2.43.0
>>
>>

-- 
Thanks,
Meghana Malladi