Message-ID: <CADvTj4pZrOo8O=kH_RzoTNMG3vHEzwy8KsgP9eWSic46o9cAdA@mail.gmail.com>
Date: Fri, 30 May 2025 18:49:09 -0600
From: James Hilliard <james.hilliard1@...il.com>
To: Florian Fainelli <f.fainelli@...il.com>
Cc: Andrew Lunn <andrew@...n.ch>, netdev@...r.kernel.org, linux-sunxi@...ts.linux.dev, 
	Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller" <davem@...emloft.net>, 
	Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
	Maxime Coquelin <mcoquelin.stm32@...il.com>, Alexandre Torgue <alexandre.torgue@...s.st.com>, 
	Russell King <linux@...linux.org.uk>, 
	"Russell King (Oracle)" <rmk+kernel@...linux.org.uk>, Furong Xu <0x1207@...il.com>, 
	Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>, linux-stm32@...md-mailman.stormreply.com, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] net: stmmac: allow drivers to explicitly select
 PHY device

On Fri, May 30, 2025 at 6:24 PM Florian Fainelli <f.fainelli@...il.com> wrote:
>
> On 5/30/25 17:02, James Hilliard wrote:
> > On Fri, May 30, 2025 at 5:56 PM Florian Fainelli <f.fainelli@...il.com> wrote:
> >>
> >> On 5/30/25 16:46, James Hilliard wrote:
> >>> On Tue, May 27, 2025 at 2:02 PM Andrew Lunn <andrew@...n.ch> wrote:
> >>>>
> >>>> On Tue, May 27, 2025 at 01:21:21PM -0600, James Hilliard wrote:
> >>>>> On Tue, May 27, 2025 at 1:14 PM Andrew Lunn <andrew@...n.ch> wrote:
> >>>>>>
> >>>>>> On Tue, May 27, 2025 at 11:55:54AM -0600, James Hilliard wrote:
> >>>>>>> Some devices like the Allwinner H616 need the ability to select a phy
> >>>>>>> in cases where multiple PHY's may be present in a device tree due to
> >>>>>>> needing the ability to support multiple SoC variants with runtime
> >>>>>>> PHY selection.
> >>>>>>
> >>>>>> I'm not convinced about this yet. As far as i see, it is different
> >>>>>> variants of the H616. They should have different compatibles, since
> >>>>>> they are not actually compatible, and you should have different DT
> >>>>>> descriptions. So you don't need runtime PHY selection.
> >>>>>
> >>>>> Different compatibles for what specifically? I mean the PHY compatibles
> >>>>> are just the generic "ethernet-phy-ieee802.3-c22" compatibles.
> >>>>
> >>>> You at least have a different MTD devices, exporting different
> >>>> clocks/PWM/Reset controllers. That should have different compatibles,
> >>>> since they are not compatible. You then need phandles to these
> >>>> different clocks/PWM/Reset controllers, and for one of the PHYs you
> >>>> need a phandle to the I2C bus, so the PHY driver can do the
> >>>> initialisation. So i think in the end you know what PHY you have on
> >>>> the board, so there is no need to do runtime detection.
> >>>
> >>> Hmm, thinking about this again, maybe it makes sense to just
> >>> do the runtime detection in the MFD driver entirely, as it turns
> >>> out the AC300 initialization sequence is largely a subset of the
> >>> AC200 initialization sequence(AC300 would just not need any
> >>> i2c part of the initialization sequence). So if we use the same
> >>> MFD driver which internally does autodetection then we can
> >>> avoid the need for selecting separate PHY's entirely. This at
> >>> least is largely how the vendor BSP driver works at the moment.
> >>>
> >>> Would this approach make sense?
> >>
> >> This has likely been discussed, but cannot you move the guts of patch #2
> >> into u-boot or the boot loader being used and have it patch the PHY
> >> Device Tree node's "reg" property accordingly before handing out the DTB
> >> to the kernel?
> >
> > No, that's not really the issue, the "reg" property can actually be
> > the same for both the AC200 and AC300 phy's, both support using
> > address 0, the AC200 additionally supports address 1. In my example
> > they are different simply so that they don't conflict in the device tree.
> >
> > The actual issue is that they have differing initialization sequences and
> > won't appear in mdio bus scans until after the initialization is complete.
>  > >> Another way to address what you want to do is to remove the "reg"
> >> property from the Ethernet PHY node and just let of_mdiobus_register()
> >> automatically scan, you have the advantage of having the addresses
> >> consecutive so this won't dramatically increase the boot time... I do
> >> that on the boards I suppose that have a removable mezzanine card that
> >> includes a PHY address whose address is dictated by straps so we don't
> >> want to guess, we let the kernel auto detect instead.
> >
> > Yeah, I noticed this, but it doesn't really help since it's not the address
> > that's incompatible but the reset sequence, I'm having trouble finding
> > examples for mdio based reset drivers in the kernel however.
>
> Fair enough, but it seems like we need to dig up a bit more here on that
> topic. There is an opportunity for a MDIO driver to implement a
> "pre-scan" reset by filling in a mdio_bus::reset callback and there you
> can do various things to ensure that your Ethernet PHY will be
> responsive. You can see an example under
> drivers/net/mdio/mdio-bcm-unimac.c to address a deficiency of certain
> Ethernet PHYs.

So if I need to do custom stuff to make the generic PHY's addresses
on the mdio bus live would I replace the generic "snps,dwmac-mdio"
compatible with a custom compatible maybe?

> Through Device Tree you can use the standard properties "reset-gpios",
> "reset-assert-us", "reset-deassert-us" to implement a basic reset
> sequence on a per-PHY basis, there are other properties that apply to
> the MDIO bus/controller specifically that are also documented.

The mdio initialization sequence for both PHY's is custom from my
understanding so presumably we can't use the generic "reset-gpios"
and such.

> How does it currently work given that your example Device Tree uses:
>
> compatible = "ethernet-phy-ieee802.3-c22"
>
> this will still require the OF MDIO bus layer to read the
> PHYSID1/PHYSID2 registers in order to match your PHY device with its
> driver. You indicated that the PHYs "won't appear in mdio bus scan"
> unless that sequence is implemented. How would they currently respond
> given the example?

In my example it's not actually doing the initialization part yet, that's
all being done in some super hacky u-boot code. My assumption was
that we need different generic phy nodes to differentiate the resets
but I suppose that could all be done elsewhere in whichever driver
implements the initialization sequence.

> If you can involve the boot loader, you can create a compatible string
> for your PHY of the form:
>
> compatible = "ethernet-phy-idae02.5090"
>
> that includes the PHY OUI, and that will tell the OF MDIO bus code to
> bind the PHY device with the driver specified in the compatible string
> without reading the PHYSID1/PHYSID2 registers. Since you can detect the
> boards variants, you could do that.

The address 0 and 1 PHY OUI's are the same for the AC200/AC300,
the AC300 PHY however has a different PHY OUI for address 0x10
which is effectively used in place of the i2c initialization sequence in
the AC200. Note this 0x10 address is not usable for normal operations,
it's essentially only used to activate the main mdio address 0 used
for normal operations.

> It then becomes highly desirable to have a "dedicated" (as opposed to
> using the "Generic PHY") driver that within the .probe function can take
> care of putting the PHY in a working state.
> --
> Florian

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