netdev - Re: [Intel-wired-lan] [PATCH iwl-next 2/8] ice: add functions to get and set Tx queue context

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Message-ID: <29c8cd2f-58e8-4cc9-a3f1-a114d8dca72a@intel.com>
Date: Mon, 23 Jun 2025 16:36:26 -0700
From: Jacob Keller <jacob.e.keller@...el.com>
To: "Loktionov, Aleksandr" <aleksandr.loktionov@...el.com>, Intel Wired LAN
	<intel-wired-lan@...ts.osuosl.org>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>, "Chittim, Madhu"
	<madhu.chittim@...el.com>, "Cao, Yahui" <yahui.cao@...el.com>, "Nguyen,
 Anthony L" <anthony.l.nguyen@...el.com>, "Kitszel, Przemyslaw"
	<przemyslaw.kitszel@...el.com>
Subject: Re: [Intel-wired-lan] [PATCH iwl-next 2/8] ice: add functions to get
 and set Tx queue context



On 6/20/2025 3:05 AM, Loktionov, Aleksandr wrote:
> 
> 
>> -----Original Message-----
>> From: Intel-wired-lan <intel-wired-lan-bounces@...osl.org> On Behalf
>> Of Jacob Keller
>> Sent: Thursday, June 19, 2025 12:25 AM
>> To: Intel Wired LAN <intel-wired-lan@...ts.osuosl.org>
>> Cc: Keller, Jacob E <jacob.e.keller@...el.com>;
>> netdev@...r.kernel.org; Chittim, Madhu <madhu.chittim@...el.com>; Cao,
>> Yahui <yahui.cao@...el.com>; Nguyen, Anthony L
>> <anthony.l.nguyen@...el.com>; Kitszel, Przemyslaw
>> <przemyslaw.kitszel@...el.com>
>> Subject: [Intel-wired-lan] [PATCH iwl-next 2/8] ice: add functions to
>> get and set Tx queue context
>>
>> The live migration driver will need to save and restore the Tx queue
>> context state from the hardware registers. This state contains both
>> static fields which do not change during Tx traffic as well as dynamic
>> fields which may change during Tx traffic.
>>
>> Unlike the Rx context, the Tx queue context is accessed indirectly
>> from GLCOMM_QTX_CNTX_CTL and GLCOMM_QTX_CNTX_DATA registers. These
>> registers are shared by multiple PFs on the same PCIe card. Multiple
>> PFs cannot safely access the registers simultaneously, and there is no
>> hardware semaphore or logic to control access. To handle this,
>> introduce the txq_ctx_lock to the ice_adapter structure. This is
>> similar to the ptp_gltsyn_time_lock. All PFs on the same adapter share
>> this structure, and use it to serialize access to the registers to
>> prevent error.
> Is the solution compatible if different PF ports are passed through to different VMs? 
> 
No, but no software solution here would be. This should work if you pass
both PFs to the same VM, but without some sort of cross-host connection
you would not be able to handle this in software.

I think everything related to ice_adapter pretty much requires that you
assign all PFs to the same VM.

We do not have a hardware solution here so this is the best we can do
right now.