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Message-ID: <20250626162921.1173068-2-anthony.l.nguyen@intel.com>
Date: Thu, 26 Jun 2025 09:29:12 -0700
From: Tony Nguyen <anthony.l.nguyen@...el.com>
To: davem@...emloft.net,
kuba@...nel.org,
pabeni@...hat.com,
edumazet@...gle.com,
andrew+netdev@...n.ch,
netdev@...r.kernel.org
Cc: Jacob Keller <jacob.e.keller@...el.com>,
anthony.l.nguyen@...el.com,
karol.kolacinski@...el.com,
przemyslaw.kitszel@...el.com,
richardcochran@...il.com
Subject: [PATCH net-next 1/8] ice: clear time_sync_en field for E825-C during reprogramming
From: Jacob Keller <jacob.e.keller@...el.com>
When programming the Clock Generation Unit for E285-C hardware, we need
to clear the time_sync_en bit of the DWORD 9 before we set the
frequency.
Co-developed-by: Karol Kolacinski <karol.kolacinski@...el.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@...el.com>
Signed-off-by: Jacob Keller <jacob.e.keller@...el.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@...el.com>
---
drivers/net/ethernet/intel/ice/ice_tspll.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/net/ethernet/intel/ice/ice_tspll.c b/drivers/net/ethernet/intel/ice/ice_tspll.c
index 08af4ced50eb..e2f07d60fcdc 100644
--- a/drivers/net/ethernet/intel/ice/ice_tspll.c
+++ b/drivers/net/ethernet/intel/ice/ice_tspll.c
@@ -342,6 +342,14 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
return err;
}
+ if (dw9.time_sync_en) {
+ dw9.time_sync_en = 0;
+
+ err = ice_write_cgu_reg(hw, ICE_CGU_R9, dw9.val);
+ if (err)
+ return err;
+ }
+
/* Set the frequency */
dw9.time_ref_freq_sel = clk_freq;
@@ -353,6 +361,7 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
dw9.time_ref_en = 1;
dw9.clk_eref0_en = 0;
}
+ dw9.time_sync_en = 1;
err = ice_write_cgu_reg(hw, ICE_CGU_R9, dw9.val);
if (err)
return err;
--
2.47.1
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