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Message-ID: <0a73070b-b7b0-4697-9fb6-b43a4e6834b6@intel.com>
Date: Fri, 27 Jun 2025 16:05:20 -0700
From: Dave Jiang <dave.jiang@...el.com>
To: Jonathan Cameron <Jonathan.Cameron@...wei.com>,
alejandro.lucero-palau@....com
Cc: linux-cxl@...r.kernel.org, netdev@...r.kernel.org,
dan.j.williams@...el.com, edward.cree@....com, davem@...emloft.net,
kuba@...nel.org, pabeni@...hat.com, edumazet@...gle.com,
Alejandro Lucero <alucerop@....com>, Zhi Wang <zhiw@...dia.com>,
Ben Cheatham <benjamin.cheatham@....com>
Subject: Re: [PATCH v17 16/22] cxl/region: Factor out interleave ways setup
On 6/27/25 2:13 AM, Jonathan Cameron wrote:
> On Tue, 24 Jun 2025 15:13:49 +0100
> <alejandro.lucero-palau@....com> wrote:
>
>> From: Alejandro Lucero <alucerop@....com>
>>
>> Region creation based on Type3 devices is triggered from user space
>> allowing memory combination through interleaving.
>>
>> In preparation for kernel driven region creation, that is Type2 drivers
>> triggering region creation backed with its advertised CXL memory, factor
>> out a common helper from the user-sysfs region setup for interleave ways.
>>
>> Signed-off-by: Alejandro Lucero <alucerop@....com>
>> Reviewed-by: Zhi Wang <zhiw@...dia.com>
>> Reviewed-by: Dave Jiang <dave.jiang@...el.com>
>> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
>> Reviewed-by: Ben Cheatham <benjamin.cheatham@....com>
> As a heads up, this code changes a fair bit in Dan's ACQUIRE() series
> that may well land before this. Dave can ask for whatever resolution he
> wants when we get to that stage!
>
>
We probably want to rebase on top of that. Dan has an immutable branch in cxl.git for the ACQUIRE() patch. Or are you talking about the outstanding CXL changes?
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