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Message-ID: <aGFR4PJv0pdKdD94@makrotopia.org>
Date: Sun, 29 Jun 2025 15:46:56 +0100
From: Daniel Golle <daniel@...rotopia.org>
To: Frank Wunderlich <linux@...web.de>
Cc: MyungJoo Ham <myungjoo.ham@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Andrew Lunn <andrew@...n.ch>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Frank Wunderlich <frank-w@...lic-files.de>,
Johnson Wang <johnson.wang@...iatek.com>,
Arınç ÜNAL <arinc.unal@...nc9.com>,
Landen Chao <Landen.Chao@...iatek.com>,
DENG Qingfang <dqfext@...il.com>,
Sean Wang <sean.wang@...iatek.com>,
Lorenzo Bianconi <lorenzo@...nel.org>, Felix Fietkau <nbd@....name>,
linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v7 07/14] arm64: dts: mediatek: mt7988: add basic
ethernet-nodes
On Sat, Jun 28, 2025 at 06:54:42PM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@...lic-files.de>
>
> Add basic ethernet related nodes.
>
> Mac1+2 needs pcs (sgmii+usxgmii) to work correctly which will be linked
> later when driver is merged.
>
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
> ---
> v6:
> - fix whitespace-errors for pdma irqs (spaces vs. tabs)
> - move sram from eth reg to own sram node (needs CONFIG_SRAM)
>
> v5:
> - add reserved irqs and change names to fe0..fe3
> - change rx-ringX to pdmaX to be closer to documentation
>
> v4:
> - comment for fixed-link on gmac0
> - update 2g5 phy node
> - unit-name dec instead of hex to match reg property
> - move compatible before reg
> - drop phy-mode
> - add interrupts for RSS
> - add interrupt-names and drop reserved irqs for ethernet
> - some reordering
> - eth-reg and clock whitespace-fix based on angelos review
> ---
> arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 137 +++++++++++++++++++++-
> 1 file changed, 134 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> index 560ec86dbec0..cf765a6b1fa8 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
> @@ -680,7 +680,28 @@ xphyu3port0: usb-phy@...13000 {
> };
> };
>
> - clock-controller@...40000 {
> + xfi_tphy0: phy@...20000 {
> + compatible = "mediatek,mt7988-xfi-tphy";
> + reg = <0 0x11f20000 0 0x10000>;
> + clocks = <&xfi_pll CLK_XFIPLL_PLL_EN>,
> + <&topckgen CLK_TOP_XFI_PHY_0_XTAL_SEL>;
> + clock-names = "xfipll", "topxtal";
> + resets = <&watchdog 14>;
> + mediatek,usxgmii-performance-errata;
> + #phy-cells = <0>;
> + };
> +
> + xfi_tphy1: phy@...30000 {
> + compatible = "mediatek,mt7988-xfi-tphy";
> + reg = <0 0x11f30000 0 0x10000>;
> + clocks = <&xfi_pll CLK_XFIPLL_PLL_EN>,
> + <&topckgen CLK_TOP_XFI_PHY_1_XTAL_SEL>;
> + clock-names = "xfipll", "topxtal";
> + resets = <&watchdog 15>;
> + #phy-cells = <0>;
> + };
> +
> + xfi_pll: clock-controller@...40000 {
> compatible = "mediatek,mt7988-xfi-pll";
> reg = <0 0x11f40000 0 0x1000>;
> resets = <&watchdog 16>;
> @@ -714,19 +735,129 @@ phy_calibration_p3: calib@97c {
> };
> };
>
> - clock-controller@...00000 {
> + ethsys: clock-controller@...00000 {
> compatible = "mediatek,mt7988-ethsys", "syscon";
> reg = <0 0x15000000 0 0x1000>;
> #clock-cells = <1>;
> #reset-cells = <1>;
> };
>
> - clock-controller@...31000 {
> + ethwarp: clock-controller@...31000 {
> compatible = "mediatek,mt7988-ethwarp";
> reg = <0 0x15031000 0 0x1000>;
> #clock-cells = <1>;
> #reset-cells = <1>;
> };
> +
> + eth: ethernet@...00000 {
> + compatible = "mediatek,mt7988-eth";
> + reg = <0 0x15100000 0 0x80000>;
I think this should be
reg = <0 0x15100000 0 0x40000>;
as the range from 15140000 ~ 1517ffff is used as SRAM on MT7981/MT7986 and
doesn't seem to be used at all on MT7988.
root@...nWrt:~# devmem 0x15140000 32
0xDEADBEEF
...
root@...nWrt:~# devmem 0x1517fffc 32
0xDEADBEEF
(with 0xDEADBEEF all that range)
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