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Message-Id: <20250711065748.250159-2-wei.fang@nxp.com>
Date: Fri, 11 Jul 2025 14:57:37 +0800
From: Wei Fang <wei.fang@....com>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
richardcochran@...il.com,
claudiu.manoil@....com,
vladimir.oltean@....com,
xiaoning.wang@....com,
andrew+netdev@...n.ch,
davem@...emloft.net,
edumazet@...gle.com,
kuba@...nel.org,
pabeni@...hat.com
Cc: fushi.peng@....com,
devicetree@...r.kernel.org,
netdev@...r.kernel.org,
linux-kernel@...r.kernel.org,
imx@...ts.linux.dev
Subject: [PATCH net-next 01/12] dt-bindings: ptp: add bindings for NETC Timer
Add device tree binding doc for the PTP clock based on NETC Timer.
Signed-off-by: Wei Fang <wei.fang@....com>
---
.../devicetree/bindings/ptp/nxp,ptp-netc.yaml | 67 +++++++++++++++++++
1 file changed, 67 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ptp/nxp,ptp-netc.yaml
diff --git a/Documentation/devicetree/bindings/ptp/nxp,ptp-netc.yaml b/Documentation/devicetree/bindings/ptp/nxp,ptp-netc.yaml
new file mode 100644
index 000000000000..b6b2e881a3c0
--- /dev/null
+++ b/Documentation/devicetree/bindings/ptp/nxp,ptp-netc.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ptp/nxp,ptp-netc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP NETC Timer PTP clock
+
+description:
+ NETC Timer provides current time with nanosecond resolution, precise
+ periodic pulse, pulse on timeout (alarm), and time capture on external
+ pulse support. And it supports time synchronization as required for
+ IEEE 1588 and IEEE 802.1AS-2020.
+
+maintainers:
+ - Wei Fang <wei.fang@....com>
+ - Clark Wang <xiaoning.wang@....com>
+
+properties:
+ compatible:
+ enum:
+ - pci1131,ee02
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ oneOf:
+ - enum:
+ - system
+ - ccm_timer
+ - ext_1588
+
+ nxp,pps-channel:
+ $ref: /schemas/types.yaml#/definitions/uint8
+ default: 0
+ description:
+ Specifies to which fixed interval period pulse generator is
+ used to generate PPS signal.
+ enum: [0, 1, 2]
+
+required:
+ - compatible
+ - reg
+
+allOf:
+ - $ref: /schemas/pci/pci-device.yaml
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ pcie {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ ethernet@18,0 {
+ compatible = "pci1131,ee02";
+ reg = <0x00c000 0 0 0 0>;
+ clocks = <&scmi_clk 18>;
+ clock-names = "ccm_timer";
+ nxp,pps-channel = /bits/ 8 <1>;
+ };
+ };
--
2.34.1
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