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Message-ID: <20250716164158.1537269-4-hkelam@marvell.com>
Date: Wed, 16 Jul 2025 22:11:57 +0530
From: Hariprasad Kelam <hkelam@...vell.com>
To: <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <kuba@...nel.org>, <davem@...emloft.net>, <sgoutham@...vell.com>,
        <gakula@...vell.com>, <jerinj@...vell.com>, <lcherian@...vell.com>,
        <sbhatta@...vell.com>, <hkelam@...vell.com>, <naveenm@...vell.com>,
        <edumazet@...gle.com>, <pabeni@...hat.com>, <andrew+netdev@...n.ch>,
        <bbhushan2@...vell.com>
Subject: [net-next 3/4] Octeontx2-af: RPM: Update DMA mask

CGX/RPM driver supports 48 bits of DMA addressing. Update
the DMA mask accordingly.

Signed-off-by: Hariprasad Kelam <hkelam@...vell.com>
---
 drivers/net/ethernet/marvell/octeontx2/af/cgx.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
index cd6c5229d0ed..ab5838865c3f 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c
@@ -1964,6 +1964,12 @@ static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 		goto err_disable_device;
 	}
 
+	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));
+	if (err) {
+		dev_err(dev, "DMA mask config failed, abort\n");
+		goto err_release_regions;
+	}
+
 	/* MAP configuration registers */
 	cgx->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
 	if (!cgx->reg_base) {
-- 
2.34.1


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