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Message-ID: <20250721-wol-smsc-phy-v1-4-89d262812dba@foss.st.com>
Date: Mon, 21 Jul 2025 13:14:46 +0200
From: Gatien Chevallier <gatien.chevallier@...s.st.com>
To: Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller"
<davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski
<kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Rob Herring
<robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre
Torgue <alexandre.torgue@...s.st.com>,
Christophe Roullier
<christophe.roullier@...s.st.com>,
Andrew Lunn <andrew@...n.ch>, Heiner
Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>, Simon
Horman <horms@...nel.org>,
Tristram Ha <Tristram.Ha@...rochip.com>,
Florian
Fainelli <florian.fainelli@...adcom.com>
CC: <netdev@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
Gatien Chevallier <gatien.chevallier@...s.st.com>
Subject: [PATCH net-next 4/4] arm: dts: st: activate ETH1 WoL from PHY on
stm32mp135f-dk
On this board, the ETH1 supports WoL from PHY. Add the "st,phy-wol"
property to support it.
Signed-off-by: Gatien Chevallier <gatien.chevallier@...s.st.com>
---
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
index 9764a6bfa5b428c8524a5902c10b7807dda46b3d..d746424b039013759bfbcce5193a701ff775e715 100644
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -193,6 +193,7 @@ ðernet1 {
pinctrl-names = "default", "sleep";
phy-mode = "rmii";
phy-handle = <&phy0_eth1>;
+ st,phy-wol;
mdio {
#address-cells = <1>;
--
2.35.3
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