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Message-ID: <6883ee5a34049_134cc710072@dwillia2-xfh.jf.intel.com.notmuch>
Date: Fri, 25 Jul 2025 13:51:38 -0700
From: <dan.j.williams@...el.com>
To: <alejandro.lucero-palau@....com>, <linux-cxl@...r.kernel.org>,
<netdev@...r.kernel.org>, <dan.j.williams@...el.com>, <edward.cree@....com>,
<davem@...emloft.net>, <kuba@...nel.org>, <pabeni@...hat.com>,
<edumazet@...gle.com>, <dave.jiang@...el.com>
CC: Alejandro Lucero <alucerop@....com>
Subject: Re: [PATCH v17 00/22] Type2 device basic support
alejandro.lucero-palau@ wrote:
> From: Alejandro Lucero <alucerop@....com>
>
> v17 changes: (Dan Williams review)
> - use devm for cxl_dev_state allocation
> - using current cxl struct for checking capability registers found by
> the driver.
> - simplify dpa initialization without a mailbox not supporting pmem
> - add cxl_acquire_endpoint for protection during initialization
> - add callback/action to cxl_create_region for a driver notified about cxl
> core kernel modules removal.
> - add sfc function to disable CXL-based PIO buffers if such a callback
> is invoked.
> - Always manage a Type2 created region as private not allowing DAX.
[..]
> base-commit: 0ff41df1cb268fc69e703a08a57ee14ae967d0ca
That's v6.15. At time of writing v6.16-rc3 was out. At a minimum I would
expect new functionality targeting the next kernel to be based on -rc2
of the previous kernel.
It might be ok if the conflicts are low, but going forward do move your
baseline to at least -rc2 if not later.
This highlights that CXL needs a
Documentation/process/maintainer-handbooks.rst entry to detail
expectations like this.
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