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Message-ID: <20250725-amiable-strict-pudu-5cce71@kuoka>
Date: Fri, 25 Jul 2025 09:11:54 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Lorenzo Bianconi <lorenzo@...nel.org>
Cc: Andrew Lunn <andrew+netdev@...n.ch>, 
	"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, 
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Simon Horman <horms@...nel.org>, Felix Fietkau <nbd@....name>, 
	linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org, 
	devicetree@...r.kernel.org
Subject: Re: [PATCH net-next v5 1/7] dt-bindings: net: airoha: npu: Add
 memory regions used for wlan offload

On Wed, Jul 23, 2025 at 07:19:50PM +0200, Lorenzo Bianconi wrote:
> Document memory regions used by Airoha EN7581 NPU for wlan traffic
> offloading. The brand new added memory regions do not introduce any
> backward compatibility issues since they will be used just to offload
> traffic to/from the MT76 wireless NIC and the MT76 probing will not fail
> if these memory regions are not provide, it will just disable offloading
> via the NPU module.
> 
> Signed-off-by: Lorenzo Bianconi <lorenzo@...nel.org>
> ---
>  .../devicetree/bindings/net/airoha,en7581-npu.yaml    | 19 +++++++++++++++----
>  1 file changed, 15 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml b/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml
> index 76dd97c3fb4004674dc30a54c039c1cc19afedb3..f99d60f75bb03931a1c4f35066c72c709e337fd2 100644
> --- a/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml
> +++ b/Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml
> @@ -41,9 +41,18 @@ properties:
>        - description: wlan irq line5
>  
>    memory-region:
> -    maxItems: 1
> -    description:
> -      Memory used to store NPU firmware binary.

I still do not get why this cannot be kept backwards compatible. I
looked at your driver code and NPU offload support RFC, and they look
correct. Yet what stops any future developer from changing:

	mt76_npu_init(mdev, pci_resource_start(pdev, 0),
		pdev->bus && pci_domain_nr(pdev->bus) ? 3 : 2);

into:

	ret = mt76_npu_init(...)
	if (ret)
		goto err...;

? Why would anyone NOT DO such change in the future?

I think I asked about this last time as well - why you cannot keep new
entries optional (minItems: 1)?

Best regards,
Krzysztof


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