netdev - Re: [PATCH v17 10/22] cx/memdev: Indicate probe deferral

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Message-ID: <6889958acca0f_55f09100b2@dwillia2-xfh.jf.intel.com.notmuch>
Date: Tue, 29 Jul 2025 20:46:18 -0700
From: <dan.j.williams@...el.com>
To: <dan.j.williams@...el.com>, Alejandro Lucero Palau <alucerop@....com>,
	Dave Jiang <dave.jiang@...el.com>, <alejandro.lucero-palau@....com>,
	<linux-cxl@...r.kernel.org>, <netdev@...r.kernel.org>,
	<dan.j.williams@...el.com>, <edward.cree@....com>, <davem@...emloft.net>,
	<kuba@...nel.org>, <pabeni@...hat.com>, <edumazet@...gle.com>
Subject: Re: [PATCH v17 10/22] cx/memdev: Indicate probe deferral

dan.j.williams@ wrote:
[..]
> Meanwhile, I am going to rework devm_cxl_add_memdev() to make it report
> when CXL port arrival is deferred, permanently failed, or successful.

Here is a branch with my work-in-progress thoughts on fixing some of
these module load ordering problems and obviating the need for
cxl_acquire_endpoint():

https://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl.git/log/?h=for-6.18/cxl-probe-order

Feel free to steal from that branch and take code upstream with my
Co-developed-by. The main missing piece is integration with Terry's
"pdev->is_cxl" enabling to know when it is worth waiting for CXL
scanning and when to fallback to PCIe only.