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Message-ID: <82e6a2d7-f341-468b-b7f6-e3c6768ba474@lunn.ch>
Date: Thu, 31 Jul 2025 15:50:38 +0200
From: Andrew Lunn <andrew@...n.ch>
To: markus.stockhausen@....de
Cc: 'Heiner Kallweit' <hkallweit1@...il.com>, linux@...linux.org.uk,
davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, michael@...sekall.de, daniel@...rotopia.org,
netdev@...r.kernel.org, jan@....eu
Subject: Re: [PATCH v2] net: phy: realtek: convert RTL8226-CG to c45 only
> > For my understanding: Which hardware disables c22 MMD access on RTL8226 how?
> > RTL930x configures RTL8226 in a way that is doesn't accept c45 over c22 any longer?
>
> sorry to be not clear about this. We have rtl9300 mdio driver
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree
> /drivers/net/mdio/mdio-realtek-rtl9300.c?h=v6.16
>
> This must decide how its four smi busses are configured. Either c22
> or c45. https://svanheule.net/realtek/longan/register/smi_glb_ctrl
> So it does.
>
> /* Put the interfaces into C45 mode if required */
> glb_ctrl_mask = GENMASK(19, 16);
> for (i = 0; i < MAX_SMI_BUSSES; i++)
> if (priv->smi_bus_is_c45[i])
> glb_ctrl_val |= GLB_CTRL_INTF_SEL(i);
> ...
> err = regmap_update_bits(regmap, SMI_GLB_CTRL,
> glb_ctrl_mask, glb_ctrl_val);
>
> As soon as this bit is set to one mode the bus will block most
> accesses with the other mode. E.g. In c22 mode registers 13/14
> are a dead end. So the only option for the bus is to limit access
> like this.
>
> bus->name = "Realtek Switch MDIO Bus";
> if (priv->smi_bus_is_c45[mdio_bus]) {
> bus->read_c45 = rtl9300_mdio_read_c45;
> bus->write_c45 = rtl9300_mdio_write_c45;
> } else {
> bus->read = rtl9300_mdio_read_c22;
> bus->write = rtl9300_mdio_write_c22;
> }
Please summaries this for in the commit message. Not using C22 in the
driver is only part of the overall picture. In phylib, there are a
number of places in core where if an op is not provided by the driver,
it will fall back to a genphy_ helper which will do a C22 access. It
would be good if the commit message made is clear this has been
considered, and that such operations will fail because the MDIO driver
itself does not support C22.
Andrew
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