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Message-ID: <e9a886f2-527b-4375-bb2c-15f38b56675f@lunn.ch>
Date: Thu, 31 Jul 2025 17:00:12 +0200
From: Andrew Lunn <andrew@...n.ch>
To: MD Danish Anwar <danishanwar@...com>
Cc: Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Meghana Malladi <m-malladi@...com>,
Himanshu Mittal <h-mittal1@...com>,
Ravi Gunasekaran <r-gunasekaran@...com>,
linux-arm-kernel@...ts.infradead.org, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, srk@...com,
Vignesh Raghavendra <vigneshr@...com>,
Roger Quadros <rogerq@...nel.org>
Subject: Re: [PATCH net] net: ti: icssg-prueth: Fix emac link speed handling
On Thu, Jul 31, 2025 at 05:38:12PM +0530, MD Danish Anwar wrote:
> When link settings are changed emac->speed is populated by
> emac_adjust_link(). The link speed and other settings are then written into
> the DRAM. However if both ports are brought down after this and brought up
> again or if the operating mode is changed and a firmware reload is needed,
> the DRAM is cleared by icssg_config(). As a result the link settings are
> lost.
>
> Fix this by calling emac_adjust_link() after icssg_config(). This re
> populates the settings in the DRAM after a new firmware load.
It is only safe to access phydev members when the phydev lock is
held. When phylib calls emac_adjust_link() it is holding this lock, so
MAC drivers don't need to worry about it. However, if you call it
directly, without the lock, bad things will happen.
Andrew
---
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