netdev - Re: [PATCH RFC net-next 18/23] net: dsa: lantiq

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Message-ID: <80e49f31a311787ebdd24992e3822727a708a0b9.camel@siemens.com>
Date: Thu, 21 Aug 2025 17:59:23 +0000
From: "Sverdlin, Alexander" <alexander.sverdlin@...mens.com>
To: "hauke@...ke-m.de" <hauke@...ke-m.de>, "olteanv@...il.com"
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CC: "john@...ozen.org" <john@...ozen.org>, "Stockmann, Lukas"
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Subject: Re: [PATCH RFC net-next 18/23] net: dsa: lantiq_gswip: convert to use
 regmap

Hi Daniel,

On Sat, 2025-08-16 at 20:56 +0100, Daniel Golle wrote:
> Use regmap for register access in preparation for supporting the MaxLinear
> GSW1xx family of switches connected via MDIO or SPI.
> 
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>

...

> --- a/drivers/net/dsa/lantiq_gswip.c
> +++ b/drivers/net/dsa/lantiq_gswip.c

...

>  static void gswip_switch_mask(struct gswip_priv *priv, u32 clear, u32 set,
>  			      u32 offset)
>  {
> -	u32 val = gswip_switch_r(priv, offset);
> +	int ret;
>  
> -	val &= ~(clear);
> -	val |= set;
> -	gswip_switch_w(priv, val, offset);
> +	ret = regmap_update_bits_base(priv->gswip, offset, clear | set, set,
> +				      NULL, false, true);

The above looks like regmap_write_bits()? 

...


>  static void gswip_mdio_mask(struct gswip_priv *priv, u32 clear, u32 set,
>  			    u32 offset)
>  {
> -	u32 val = gswip_mdio_r(priv, offset);
> -
> -	val &= ~(clear);
> -	val |= set;
> -	gswip_mdio_w(priv, val, offset);
> -}
> -
> -static u32 gswip_mii_r(struct gswip_priv *priv, u32 offset)
> -{
> -	return __raw_readl(priv->mii + (offset * 4));
> -}
> +	int ret;
>  
> -static void gswip_mii_w(struct gswip_priv *priv, u32 val, u32 offset)
> -{
> -	__raw_writel(val, priv->mii + (offset * 4));
> +	ret = regmap_update_bits_base(priv->mdio, offset, clear | set, set,
> +				      NULL, false, true);

regmap_write_bits()?

> +	if (ret) {
> +		WARN_ON_ONCE(1);
> +		dev_err(priv->dev, "failed to update mdio register\n");
> +	}
>  }
>  
>  static void gswip_mii_mask(struct gswip_priv *priv, u32 clear, u32 set,
>  			   u32 offset)
>  {
> -	u32 val = gswip_mii_r(priv, offset);
> +	int ret;
>  
> -	val &= ~(clear);
> -	val |= set;
> -	gswip_mii_w(priv, val, offset);
> +	ret = regmap_update_bits_base(priv->mii, offset, clear | set, set, NULL,
> +				      false, true);

ditto


-- 
Alexander Sverdlin
Siemens AG
www.siemens.com