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Message-ID: <d8df76b5-fd6d-4779-b133-18ab2c987ae1@linux.dev>
Date: Tue, 26 Aug 2025 17:08:55 +0100
From: Vadim Fedorenko <vadim.fedorenko@...ux.dev>
To: Fan Gong <gongfan1@...wei.com>, Zhu Yikai <zhuyikai1@...artners.com>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
 "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Simon Horman <horms@...nel.org>, Andrew Lunn <andrew+netdev@...n.ch>,
 linux-doc@...r.kernel.org, Jonathan Corbet <corbet@....net>,
 Bjorn Helgaas <helgaas@...nel.org>, luosifu <luosifu@...wei.com>,
 Xin Guo <guoxin09@...wei.com>, Shen Chenyang <shenchenyang1@...ilicon.com>,
 Zhou Shuai <zhoushuai28@...wei.com>, Wu Like <wulike1@...wei.com>,
 Shi Jing <shijing34@...wei.com>, Meny Yossefi <meny.yossefi@...wei.com>,
 Gur Stavi <gur.stavi@...wei.com>, Lee Trager <lee@...ger.us>,
 Michael Ellerman <mpe@...erman.id.au>, Suman Ghosh <sumang@...vell.com>,
 Przemek Kitszel <przemyslaw.kitszel@...el.com>,
 Christophe JAILLET <christophe.jaillet@...adoo.fr>
Subject: Re: [PATCH net-next v01 07/12] hinic3: Queue pair resource
 initialization

On 26/08/2025 10:05, Fan Gong wrote:
> Add Tx & Rx queue resources and functions for packet transmission
> and reception.
> 
> Co-developed-by: Xin Guo <guoxin09@...wei.com>
> Signed-off-by: Xin Guo <guoxin09@...wei.com>
> Co-developed-by: Zhu Yikai <zhuyikai1@...artners.com>
> Signed-off-by: Zhu Yikai <zhuyikai1@...artners.com>
> Signed-off-by: Fan Gong <gongfan1@...wei.com>
> ---

[...]

>   struct hinic3_nic_db {
> -	u32 db_info;
> -	u32 pi_hi;
> +	__le32 db_info;
> +	__le32 pi_hi;
>   };
>   
>   static inline void hinic3_write_db(struct hinic3_io_queue *queue, int cos,
> @@ -84,15 +84,25 @@ static inline void hinic3_write_db(struct hinic3_io_queue *queue, int cos,
>   {
>   	struct hinic3_nic_db db;
>   
> -	db.db_info = DB_INFO_SET(DB_SRC_TYPE, TYPE) |
> -		     DB_INFO_SET(cflag, CFLAG) |
> -		     DB_INFO_SET(cos, COS) |
> -		     DB_INFO_SET(queue->q_id, QID);
> -	db.pi_hi = DB_PI_HIGH(pi);
> +	db.db_info =
> +		cpu_to_le32(DB_INFO_SET(DB_SRC_TYPE, TYPE) |
> +			    DB_INFO_SET(cflag, CFLAG) |
> +			    DB_INFO_SET(cos, COS) |
> +			    DB_INFO_SET(queue->q_id, QID));
> +	db.pi_hi = cpu_to_le32(DB_PI_HIGH(pi));
>   
>   	writeq(*((u64 *)&db), DB_ADDR(queue, pi));
>   }

[...]

> @@ -66,8 +97,8 @@ static void rq_wqe_buf_set(struct hinic3_io_queue *rq, uint32_t wqe_idx,
>   	struct hinic3_rq_wqe *rq_wqe;
>   
>   	rq_wqe = get_q_element(&rq->wq.qpages, wqe_idx, NULL);
> -	rq_wqe->buf_hi_addr = upper_32_bits(dma_addr);
> -	rq_wqe->buf_lo_addr = lower_32_bits(dma_addr);
> +	rq_wqe->buf_hi_addr = cpu_to_le32(upper_32_bits(dma_addr));
> +	rq_wqe->buf_lo_addr = cpu_to_le32(lower_32_bits(dma_addr));
>   }
[...]

> @@ -27,21 +27,21 @@
>   
>   /* RX Completion information that is provided by HW for a specific RX WQE */
>   struct hinic3_rq_cqe {
> -	u32 status;
> -	u32 vlan_len;
> -	u32 offload_type;
> -	u32 rsvd3;
> -	u32 rsvd4;
> -	u32 rsvd5;
> -	u32 rsvd6;
> -	u32 pkt_info;
> +	__le32 status;
> +	__le32 vlan_len;
> +	__le32 offload_type;
> +	__le32 rsvd3;
> +	__le32 rsvd4;
> +	__le32 rsvd5;
> +	__le32 rsvd6;
> +	__le32 pkt_info;
>   };
>   
>   struct hinic3_rq_wqe {
> -	u32 buf_hi_addr;
> -	u32 buf_lo_addr;
> -	u32 cqe_hi_addr;
> -	u32 cqe_lo_addr;
> +	__le32 buf_hi_addr;
> +	__le32 buf_lo_addr;
> +	__le32 cqe_hi_addr;
> +	__le32 cqe_lo_addr;
>   };

This patch has a lot of endianess-improvements changes which are
not stated in the commit message. It's better to move them to a separate
patch to avoid mixing things.

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