netdev - Re: [PATCH v2 1/5] net: cadence: macb: Set upper 32bits of DMA ring buffer

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Message-ID: <c4c9b637-c2a4-44d7-9e07-b6d8b7907cc7@suse.de>
Date: Thu, 28 Aug 2025 11:29:08 +0300
From: Stanimir Varbanov <svarbanov@...e.de>
To: Nicolas Ferre <nicolas.ferre@...rochip.com>,
 Stanimir Varbanov <svarbanov@...e.de>, Jakub Kicinski <kuba@...nel.org>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
 devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-rpi-kernel@...ts.infradead.org,
 Broadcom internal kernel review list
 <bcm-kernel-feedback-list@...adcom.com>, Andrew Lunn
 <andrew+netdev@...n.ch>, "David S . Miller" <davem@...emloft.net>,
 Eric Dumazet <edumazet@...gle.com>, Paolo Abeni <pabeni@...hat.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Florian Fainelli <florian.fainelli@...adcom.com>,
 Andrea della Porta <andrea.porta@...e.com>,
 Claudiu Beznea <claudiu.beznea@...on.dev>, Phil Elwell
 <phil@...pberrypi.com>, Jonathan Bell <jonathan@...pberrypi.com>,
 Dave Stevenson <dave.stevenson@...pberrypi.com>, stable@...r.kernel.org,
 Andrew Lunn <andrew@...n.ch>, Théo Lebrun
 <theo.lebrun@...tlin.com>
Subject: Re: [PATCH v2 1/5] net: cadence: macb: Set upper 32bits of DMA ring
 buffer

Hi Nicolas,

On 8/26/25 12:13 PM, Nicolas Ferre wrote:
> On 26/08/2025 at 10:35, Stanimir Varbanov wrote:
>> Hi Jakub,
>>
>> On 8/26/25 2:53 AM, Jakub Kicinski wrote:
>>> On Fri, 22 Aug 2025 12:34:36 +0300 Stanimir Varbanov wrote:
>>>> In case of rx queue reset and 64bit capable hardware, set the upper
>>>> 32bits of DMA ring buffer address.
>>>>
>>>> Cc: stable@...r.kernel.org # v4.6+
>>>> Fixes: 9ba723b081a2 ("net: macb: remove BUG_ON() and reset the queue
>>>> to handle RX errors")
>>>> Credits-to: Phil Elwell <phil@...pberrypi.com>
>>>> Credits-to: Jonathan Bell <jonathan@...pberrypi.com>
>>>> Signed-off-by: Stanimir Varbanov <svarbanov@...e.de>
>>>> Reviewed-by: Andrew Lunn <andrew@...n.ch>
>>>
>>>> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/
>>>> ethernet/cadence/macb_main.c
>>>> index ce95fad8cedd..36717e7e5811 100644
>>>> --- a/drivers/net/ethernet/cadence/macb_main.c
>>>> +++ b/drivers/net/ethernet/cadence/macb_main.c
>>>> @@ -1634,7 +1634,11 @@ static int macb_rx(struct macb_queue *queue,
>>>> struct napi_struct *napi,
>>>>               macb_writel(bp, NCR, ctrl & ~MACB_BIT(RE));
>>>>
>>>>               macb_init_rx_ring(queue);
>>>> -            queue_writel(queue, RBQP, queue->rx_ring_dma);
>>>> +            queue_writel(queue, RBQP, lower_32_bits(queue-
>>>> >rx_ring_dma));
>>>> +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
>>>> +            if (bp->hw_dma_cap & HW_DMA_CAP_64B)
>>>> +                    macb_writel(bp, RBQPH, upper_32_bits(queue-
>>>> >rx_ring_dma));
>>>> +#endif
>>>>
>>>>               macb_writel(bp, NCR, ctrl | MACB_BIT(RE));
>>>>
>>>
>>> Looks like a subset of Théo Lebrun's work:
>>> https://lore.kernel.org/all/20250820-macb-fixes-
>>> v4-0-23c399429164@...tlin.com/
>>> let's wait for his patches to get merged instead?
>>
>> No objections for this patch, it could be postponed. But the others from
>> the series could be applied.
> 
> Some cleanup by Théo, could interfere with sorting of compatibility
> strings...

Théo's series touches clk properties so I do not expect conflicts.

regards,
~Stan