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Message-ID: <IA1PR11MB6241A3A4DC211E09280747B38B3AA@IA1PR11MB6241.namprd11.prod.outlook.com>
Date: Fri, 29 Aug 2025 05:56:04 +0000
From: "Rinitha, SX" <sx.rinitha@...el.com>
To: "Jagielski, Jedrzej" <jedrzej.jagielski@...el.com>,
	"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>
CC: "Nguyen, Anthony L" <anthony.l.nguyen@...el.com>, "netdev@...r.kernel.org"
	<netdev@...r.kernel.org>, "Jagielski, Jedrzej" <jedrzej.jagielski@...el.com>,
	"Loktionov, Aleksandr" <aleksandr.loktionov@...el.com>, "Keller, Jacob E"
	<jacob.e.keller@...el.com>, Simon Horman <horms@...nel.org>, Paul Menzel
	<pmenzel@...gen.mpg.de>
Subject: RE: [Intel-wired-lan] [PATCH iwl-next v2] ixgbe: reduce number of
 reads when getting OROM data

> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@...osl.org> On Behalf Of Jedrzej Jagielski
> Sent: 04 August 2025 15:12
> To: intel-wired-lan@...ts.osuosl.org
> Cc: Nguyen, Anthony L <anthony.l.nguyen@...el.com>; netdev@...r.kernel.org; Jagielski, Jedrzej <jedrzej.jagielski@...el.com>; Loktionov, Aleksandr <aleksandr.loktionov@...el.com>; Keller, Jacob E <jacob.e.keller@...el.com>; Simon Horman <horms@...nel.org>; Paul Menzel <pmenzel@...gen.mpg.de>
> Subject: [Intel-wired-lan] [PATCH iwl-next v2] ixgbe: reduce number of reads when getting OROM data
>
> Currently, during locating the CIVD section, the ixgbe driver loops over the OROM area and at each iteration reads only OROM-datastruct-size amount of data. This results in many small reads and is inefficient.
>
> Optimize this by reading the entire OROM bank into memory once before entering the loop. This significantly reduces the probing time.
>
> Without this patch probing time may exceed over 25s, whereas with this patch applied avrege time of probe is not greter than 5s.
>
> without the patch:
> [14:12:22] ixgbe: Copyright (c) 1999-2016 Intel Corporation.
> [14:12:25] ixgbe 0000:21:00.0: Multiqueue Enabled: Rx Queue count = 63, Tx Queue count = 63 XDP Queue count = 0 [14:12:25] ixgbe 0000:21:00.0: 63.012 Gb/s available PCIe bandwidth (16.0 GT/s PCIe x4 link) [14:12:26] ixgbe 0000:21:00.0: MAC: 7, PHY: 27, PBA No: N55484-001 [14:12:26] ixgbe 0000:21:00.0: 20:3a:43:09:3a:12 [14:12:26] ixgbe 0000:21:00.0: Intel(R) 10 Gigabit Network Connection [14:12:50] ixgbe 0000:21:00.0 ens2f0np0: renamed from eth0
>
> with the patch:
> [14:18:18] ixgbe: Copyright (c) 1999-2016 Intel Corporation.
> [14:18:19] ixgbe 0000:21:00.0: Multiqueue Enabled: Rx Queue count = 63, Tx Queue count = 63 XDP Queue count = 0 [14:18:19] ixgbe 0000:21:00.0: 63.012 Gb/s available PCIe bandwidth (16.0 GT/s PCIe x4 link) [14:18:19] ixgbe 0000:21:00.0: MAC: 7, PHY: 27, PBA No: N55484-001 [14:18:19] ixgbe 0000:21:00.0: 20:3a:43:09:3a:12 [14:18:19] ixgbe 0000:21:00.0: Intel(R) 10 Gigabit Network Connection [14:18:22] ixgbe 0000:21:00.0 ens2f0np0: renamed from eth0
>
> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@...el.com>
> Reviewed-by: Jacob Keller <jacob.e.keller@...el.com>
> Reviewed-by: Simon Horman <horms@...nel.org>
> Reviewed-by: Paul Menzel <pmenzel@...gen.mpg.de>
> Signed-off-by: Jedrzej Jagielski <jedrzej.jagielski@...el.com>
> ---
> v2: extend the commit msg; minor code tweaks
> ---
> drivers/net/ethernet/intel/ixgbe/ixgbe_e610.c | 59 +++++++++++++------
> 1 file changed, 40 insertions(+), 19 deletions(-)
>

Tested-by: Rinitha S <sx.rinitha@...el.com> (A Contingent worker at Intel)

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