netdev - Re: [PATCH net-next] net: mvpp2: add xlg pcs inband capabilities

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <aLTMmMCq5FqjQW6g@pidgin.makrotopia.org>
Date: Sun, 31 Aug 2025 23:28:40 +0100
From: Daniel Golle <daniel@...rotopia.org>
To: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>
Cc: Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>,
	Marcin Wojtas <marcin.s.wojtas@...il.com>, netdev@...r.kernel.org,
	Paolo Abeni <pabeni@...hat.com>
Subject: Re: [PATCH net-next] net: mvpp2: add xlg pcs inband capabilities

On Sun, Aug 31, 2025 at 06:01:51PM +0100, Russell King (Oracle) wrote:
> Add PCS inband capabilities for XLG in the Marvell PP2 driver, so
> phylink knows that 5G and 10G speeds have no inband capabilities.
> 
> Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>

Reviewed-by: Daniel Golle <daniel@...rotopia.org>

> ---
> The lack of this patch meant that I didn't see the problems with 10G
> SFP modules, as phylink becomes permissive without these capabilities,
> thereby causing a weakness in my run-time testing.
> 
>  drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> index 8ebb985d2573..35d1184458fd 100644
> --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
> @@ -6222,6 +6222,12 @@ static struct mvpp2_port *mvpp2_pcs_gmac_to_port(struct phylink_pcs *pcs)
>  	return container_of(pcs, struct mvpp2_port, pcs_gmac);
>  }
>  
> +static unsigned int mvpp2_xjg_pcs_inband_caps(struct phylink_pcs *pcs,
> +					      phy_interface_t interface)
> +{
> +	return LINK_INBAND_DISABLE;
> +}
> +
>  static void mvpp2_xlg_pcs_get_state(struct phylink_pcs *pcs,
>  				    unsigned int neg_mode,
>  				    struct phylink_link_state *state)
> @@ -6256,6 +6262,7 @@ static int mvpp2_xlg_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
>  }
>  
>  static const struct phylink_pcs_ops mvpp2_phylink_xlg_pcs_ops = {
> +	.pcs_inband_caps = mvpp2_xjg_pcs_inband_caps,
>  	.pcs_get_state = mvpp2_xlg_pcs_get_state,
>  	.pcs_config = mvpp2_xlg_pcs_config,
>  };
> -- 
> 2.47.2
> 
>