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Message-ID:
 <PH7PR19MB56360AF7B6FCB1AAD0B27120B407A@PH7PR19MB5636.namprd19.prod.outlook.com>
Date: Mon, 1 Sep 2025 09:38:44 +0000
From: Jack Ping Chng <jchng@...linear.com>
To: Andrew Lunn <andrew@...n.ch>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"davem@...emloft.net" <davem@...emloft.net>, "andrew+netdev@...n.ch"
	<andrew+netdev@...n.ch>, "edumazet@...gle.com" <edumazet@...gle.com>,
	"kuba@...nel.org" <kuba@...nel.org>, "pabeni@...hat.com" <pabeni@...hat.com>,
	"robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>, Yi xin Zhu
	<yzhu@...linear.com>, Suresh Nagaraj <sureshnagaraj@...linear.com>
Subject: RE: [PATCH net-next v3 2/2] net: maxlinear: Add support for MxL LGM
 SoC

Hi Andrew,

On Fri, 29 Aug 2025 22:24:06 +0200
Andrew Lunn <andrew@...n.ch> wrote:

> > +This document describes the Linux driver for the MaxLinear Network Processor
> > +(NP), a high-performance controller supporting multiple MACs and
> > +advanced packet processing capabilities.
> > +
> > +The MaxLinear Network processor integrates programmable hardware accelerators
> > +for tasks such as Layer 2, 3, 4 forwarding, flow steering, and traffic shaping.
> 
> By L2 and L3, do you mean this device can bridge and route frames
> between ports? So it is actually a switch?

Yes, the SoC does support packet acceleration. 
However, this patch series primarily focuses on the host interface to deliver packets to the CPU, 
where bridging and routing are handled within the network stack.

Best regards,
Jack

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