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Message-ID: <20250902-gainful-meerkat-of-prestige-dd4952@kuoka> Date: Tue, 2 Sep 2025 11:01:05 +0200 From: Krzysztof Kozlowski <krzk@...nel.org> To: Prabhakar <prabhakar.csengg@...il.com> Cc: Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Maxime Coquelin <mcoquelin.stm32@...il.com>, Alexandre Torgue <alexandre.torgue@...s.st.com>, Russell King <linux@...linux.org.uk>, Giuseppe Cavallaro <peppe.cavallaro@...com>, Jose Abreu <joabreu@...opsys.com>, Philipp Zabel <p.zabel@...gutronix.de>, Geert Uytterhoeven <geert+renesas@...der.be>, Magnus Damm <magnus.damm@...il.com>, linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com, linux-arm-kernel@...ts.infradead.org, Biju Das <biju.das.jz@...renesas.com>, Fabrizio Castro <fabrizio.castro.jz@...esas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com> Subject: Re: [PATCH net-next 2/4] dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/T2H and RZ/N2H SoCs On Tue, Sep 02, 2025 at 01:13:00AM +0100, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com> > > Document the Ethernet MAC (GMAC) IP present on the Renesas RZ/T2H > (R9A09G077) and RZ/N2H (R9A09G087) SoCs. The GMAC IP on RZ/N2H is > identical to that found on the RZ/T2H SoC. > > While the RZ/V2H(P), RZ/T2H, and RZ/N2H SoCs all integrate the Synopsys > DesignWare MAC (version 5.20), the hardware is synthesized with different > options compared to the RZ/V2H(P): > - RZ/T2H requires only 3 clocks instead of 7 > - RZ/T2H supports 8 RX/TX queue pairs instead of 4 > - RZ/T2H needs 2 reset controls with reset-names property, vs. a single > unnamed reset > - RZ/T2H has the split header feature enabled, while it is disabled on > RZ/V2H(P) > > To accommodate these differences, introduce a new generic compatible > string `renesas,rzt2h-gbeth`, used as a fallback for both RZ/T2H and > RZ/N2H SoCs. > > The DT schema is updated to validate the clocks, resets, reset-names, > interrupts, and interrupt-names properties accordingly. Also extend > `snps,dwmac.yaml` with the new `renesas,rzt2h-gbeth` compatible. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com> > --- > .../bindings/net/renesas,rzv2h-gbeth.yaml | 177 ++++++++++++++---- > .../devicetree/bindings/net/snps,dwmac.yaml | 1 + > 2 files changed, 138 insertions(+), 40 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml > index 23e39bcea96b..e01763389164 100644 > --- a/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml > +++ b/Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml > @@ -17,63 +17,112 @@ select: > - renesas,r9a09g047-gbeth > - renesas,r9a09g056-gbeth > - renesas,r9a09g057-gbeth > + - renesas,r9a09g077-gbeth > + - renesas,r9a09g087-gbeth > - renesas,rzv2h-gbeth > required: > - compatible > > properties: > compatible: > - items: > - - enum: > - - renesas,r9a09g047-gbeth # RZ/G3E > - - renesas,r9a09g056-gbeth # RZ/V2N > - - renesas,r9a09g057-gbeth # RZ/V2H(P) > - - const: renesas,rzv2h-gbeth > - - const: snps,dwmac-5.20 > + oneOf: > + - items: > + - enum: > + - renesas,r9a09g047-gbeth # RZ/G3E > + - renesas,r9a09g056-gbeth # RZ/V2N > + - renesas,r9a09g057-gbeth # RZ/V2H(P) > + - const: renesas,rzv2h-gbeth > + - const: snps,dwmac-5.20 > + > + - items: > + - enum: > + - renesas,r9a09g077-gbeth # RZ/T2H > + - renesas,r9a09g087-gbeth # RZ/N2H > + - const: renesas,rzt2h-gbeth > + - const: snps,dwmac-5.20 > > reg: > maxItems: 1 > > clocks: > - items: > - - description: CSR clock > - - description: AXI system clock > - - description: PTP clock > - - description: TX clock > - - description: RX clock > - - description: TX clock phase-shifted by 180 degrees > - - description: RX clock phase-shifted by 180 degrees > + oneOf: > + - items: > + - description: CSR clock > + - description: AXI system clock > + - description: PTP clock > + - description: TX clock > + - description: RX clock > + - description: TX clock phase-shifted by 180 degrees > + - description: RX clock phase-shifted by 180 degrees > + Drop blank line > + - items: > + - description: CSR clock > + - description: AXI system clock > + - description: TX clock > > clock-names: > - items: > - - const: stmmaceth > - - const: pclk > - - const: ptp_ref > - - const: tx > - - const: rx > - - const: tx-180 > - - const: rx-180 > - > - interrupts: > - minItems: 11 > + oneOf: > + - items: > + - const: stmmaceth > + - const: pclk > + - const: ptp_ref > + - const: tx > + - const: rx > + - const: tx-180 > + - const: rx-180 > + Drop blank line > + - items: > + - const: stmmaceth > + - const: pclk > + - const: tx > + > Just one blank line > interrupt-names: > - items: > - - const: macirq > - - const: eth_wake_irq > - - const: eth_lpi > - - const: rx-queue-0 > - - const: rx-queue-1 > - - const: rx-queue-2 > - - const: rx-queue-3 > - - const: tx-queue-0 > - - const: tx-queue-1 > - - const: tx-queue-2 > - - const: tx-queue-3 > + oneOf: > + - items: > + - const: macirq > + - const: eth_wake_irq > + - const: eth_lpi > + - const: rx-queue-0 > + - const: rx-queue-1 > + - const: rx-queue-2 > + - const: rx-queue-3 > + - const: tx-queue-0 > + - const: tx-queue-1 > + - const: tx-queue-2 > + - const: tx-queue-3 > + > + - items: > + - const: macirq > + - const: eth_wake_irq > + - const: eth_lpi > + - const: rx-queue-0 > + - const: rx-queue-1 > + - const: rx-queue-2 > + - const: rx-queue-3 > + - const: rx-queue-4 > + - const: rx-queue-5 > + - const: rx-queue-6 > + - const: rx-queue-7 > + - const: tx-queue-0 > + - const: tx-queue-1 > + - const: tx-queue-2 > + - const: tx-queue-3 > + - const: tx-queue-4 > + - const: tx-queue-5 > + - const: tx-queue-6 > + - const: tx-queue-7 > > resets: > - items: > - - description: AXI power-on system reset > + oneOf: > + - items: > + - description: AXI power-on system reset > + > + - items: > + - description: GMAC stmmaceth reset That's the same as before, no? > + - description: AHB reset > + > + reset-names: true Does not look needed. Best regards, Krzysztof
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