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Message-ID: <20250903172445.rp6zajnhj6yufrkd@offworld>
Date: Wed, 3 Sep 2025 10:24:45 -0700
From: Davidlohr Bueso <dave@...olabs.net>
To: alejandro.lucero-palau@....com
Cc: linux-cxl@...r.kernel.org, netdev@...r.kernel.org,
	dan.j.williams@...el.com, edward.cree@....com, davem@...emloft.net,
	kuba@...nel.org, pabeni@...hat.com, edumazet@...gle.com,
	dave.jiang@...el.com, Alejandro Lucero <alucerop@....com>
Subject: Re: [PATCH v17 19/22] cxl: Avoid dax creation for accelerators

On Tue, 24 Jun 2025, alejandro.lucero-palau@....com wrote:

>From: Alejandro Lucero <alucerop@....com>
>
>By definition a type2 cxl device will use the host managed memory for
>specific functionality, therefore it should not be available to other
>uses.
>
>Signed-off-by: Alejandro Lucero <alucerop@....com>

Reviewed-by: Davidlohr Bueso <dave@...olabs.net>

>---
> drivers/cxl/core/region.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
>diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
>index 4ca5ade54ad9..e933e4ebed1c 100644
>--- a/drivers/cxl/core/region.c
>+++ b/drivers/cxl/core/region.c
>@@ -3857,6 +3857,13 @@ static int cxl_region_probe(struct device *dev)
> 	if (rc)
> 		return rc;
>
>+	/*
>+	 * HDM-D[B] (device-memory) regions have accelerator specific usage.
>+	 * Skip device-dax registration.
>+	 */
>+	if (cxlr->type == CXL_DECODER_DEVMEM)
>+		return 0;
>+
> 	switch (cxlr->mode) {
> 	case CXL_PARTMODE_PMEM:
> 		return devm_cxl_add_pmem_region(cxlr);
>-- 
>2.34.1
>

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