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Message-ID: <b5fbeb3f-9962-444d-85b3-3b8a11f69266@rock-chips.com>
Date: Thu, 4 Sep 2025 19:03:10 +0800
From: Chaoyi Chen <chaoyi.chen@...k-chips.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>,
Yao Zi <ziyao@...root.org>
Cc: Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller"
<davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Jonas Karlman <jonas@...boo.se>, David Wu <david.wu@...k-chips.com>,
netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH net] net: stmmac: dwmac-rk: Ensure clk_phy doesn't contain
invalid address
On 9/4/2025 6:58 PM, Russell King (Oracle) wrote:
> On Thu, Sep 04, 2025 at 03:12:24AM +0000, Yao Zi wrote:
>> if (plat->phy_node) {
>> bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0);
>> ret = PTR_ERR_OR_ZERO(bsp_priv->clk_phy);
>> - /* If it is not integrated_phy, clk_phy is optional */
>> + /*
>> + * If it is not integrated_phy, clk_phy is optional. But we must
>> + * set bsp_priv->clk_phy to NULL if clk_phy isn't proivded, or
>> + * the error code could be wrongly taken as an invalid pointer.
>> + */
> I'm concerned by this. This code is getting the first clock from the DT
> description of the PHY. We don't know what type of PHY it is, or what
> the DT description of that PHY might suggest that the first clock would
> be.
>
> However, we're geting it and setting it to 50MHz. What if the clock is
> not what we think it is?
We only set integrated_phy to 50M, which are all known targets. For external PHYs, we do not perform frequency settings.
>
> I'm not sure we should be delving in to some other device's DT
> properties to then get resources that it _uses_ to then effectively
> take control those resources.
>
> I think we need way more detail on what's going on. Commit da114122b83
> merely stated:
>
> For external phy, clk_phy should be optional, and some external phy
> need the clock input from clk_phy. This patch adds support for setting
> clk_phy for external phy.
>
> If the external PHY requires a clock supplied to it, shouldn't the PHY
> driver itself be getting that clock and setting it appropriately?
>
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