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Message-ID: <CAGXv+5HjikmVaK_++METYBvTciQt1OTm77TU_e4Zh52MpCZ8bw@mail.gmail.com>
Date: Fri, 5 Sep 2025 12:13:44 +0800
From: Chen-Yu Tsai <wenst@...omium.org>
To: Laura Nao <laura.nao@...labora.com>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, matthias.bgg@...il.com,
angelogioacchino.delregno@...labora.com, p.zabel@...gutronix.de,
richardcochran@...il.com, guangjie.song@...iatek.com,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org,
kernel@...labora.com
Subject: Re: [PATCH v5 06/27] clk: mediatek: clk-gate: Refactor
mtk_clk_register_gate to use mtk_gate struct
On Fri, Aug 29, 2025 at 5:21 PM Laura Nao <laura.nao@...labora.com> wrote:
>
> MT8196 uses a HW voter for gate enable/disable control, with
> set/clr/sta registers located in a separate regmap. Refactor
> mtk_clk_register_gate() to take a struct mtk_gate, and add a pointer to
> it in struct mtk_clk_gate. This allows reuse of the static gate data
> (including HW voter register offsets) without adding extra function
> arguments, and removes redundant duplication in the runtime data struct.
>
> Signed-off-by: Laura Nao <laura.nao@...labora.com>
Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>
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