netdev - Re: [PATCH v17 00/22] Type2 device basic support

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Message-ID: <d01f3420-04b9-45e7-aba0-74a1cfabaa27@amd.com>
Date: Mon, 8 Sep 2025 13:03:18 +0100
From: Alejandro Lucero Palau <alucerop@....com>
To: PJ Waskiewicz <ppwaskie@...nel.org>, alejandro.lucero-palau@....com,
 linux-cxl@...r.kernel.org, netdev@...r.kernel.org, dan.j.williams@...el.com,
 edward.cree@....com, davem@...emloft.net, kuba@...nel.org,
 pabeni@...hat.com, edumazet@...gle.com, dave.jiang@...el.com
Subject: Re: [PATCH v17 00/22] Type2 device basic support


On 9/6/25 00:23, PJ Waskiewicz wrote:
> Hi Alejandro,
>
> On Thu, 2025-08-28 at 09:02 +0100, Alejandro Lucero Palau wrote:
>> Hi PJ,
>>
>> On 8/27/25 17:48, PJ Waskiewicz wrote:
>>> On Tue, 2025-06-24 at 15:13 +0100, alejandro.lucero-palau@....com
>>> wrote:
>>>
>>> Hi Alejandro,
>>>
>>>> From: Alejandro Lucero <alucerop@....com>
>>>>
>>>> v17 changes: (Dan Williams review)
>>>>    - use devm for cxl_dev_state allocation
>>>>    - using current cxl struct for checking capability registers
>>>> found
>>>> by
>>>>      the driver.
>>>>    - simplify dpa initialization without a mailbox not supporting
>>>> pmem
>>>>    - add cxl_acquire_endpoint for protection during initialization
>>>>    - add callback/action to cxl_create_region for a driver
>>>> notified
>>>> about cxl
>>>>      core kernel modules removal.
>>>>    - add sfc function to disable CXL-based PIO buffers if such a
>>>> callback
>>>>      is invoked.
>>>>    - Always manage a Type2 created region as private not allowing
>>>> DAX.
>>>>
>>> I've been following the patches here since your initial RFC.  What
>>> platform are you testing these on out of curiosity?
> A bit more info for the weekend to digest.
>
> On my AMD Purico CRB, it looks like I may be missing pieces of the ACPI
> tables in the BIOS.  I'm going to shift to a GNR that is pretty healthy
> and keep hacking away.  But this is what I'm seeing now that I ported
> everything over to these V17 patches.
>
> - devm_cxl_dev_state_create() - succeeds
>
> - cxl_pci_set_regs(pdev, CXL_REGLOC_RBI_COMPONENT, &cxl-
>> cxlds.reg_map): this is where things go wrong.  I get -ENODEV
> returned.  I'm digging into the BIOS settings, but this is the same
> place I landed on with the V16 patches.  The device is fully trained on
> all protocols.


It looks like the expected CXL device registers are not found by the 
kernel.


Note the sfc driver knows what is there, so looking for an HDM decoder 
in our case. If you do not have it, and not RAS capability either, then 
do not call it.



> Hope this rings a bell where to look.
>
> Cheers,
> -PJ