lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <1cf0b296-adaa-4c80-864c-9b78f09cd3e3@collabora.com>
Date: Mon, 8 Sep 2025 16:19:03 -0300
From: Ariel D'Alessandro <ariel.dalessandro@...labora.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: airlied@...il.com, amergnat@...libre.com, andrew+netdev@...n.ch,
 andrew-ct.chen@...iatek.com, angelogioacchino.delregno@...labora.com,
 broonie@...nel.org, chunkuang.hu@...nel.org, ck.hu@...iatek.com,
 conor+dt@...nel.org, davem@...emloft.net, dmitry.torokhov@...il.com,
 edumazet@...gle.com, flora.fu@...iatek.com, houlong.wei@...iatek.com,
 jeesw@...fas.com, jmassot@...labora.com, kernel@...labora.com,
 krzk+dt@...nel.org, kuba@...nel.org,
 kyrie.wu@...iatek.corp-partner.google.com, lgirdwood@...il.com,
 linus.walleij@...aro.org, louisalexis.eyraud@...labora.com,
 maarten.lankhorst@...ux.intel.com, matthias.bgg@...il.com,
 mchehab@...nel.org, minghsiu.tsai@...iatek.com, mripard@...nel.org,
 p.zabel@...gutronix.de, pabeni@...hat.com, robh@...nel.org,
 sean.wang@...nel.org, simona@...ll.ch, support.opensource@...semi.com,
 tiffany.lin@...iatek.com, tzimmermann@...e.de, yunfei.dong@...iatek.com,
 devicetree@...r.kernel.org, dri-devel@...ts.freedesktop.org,
 linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org,
 linux-gpio@...r.kernel.org, linux-input@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-media@...r.kernel.org,
 linux-mediatek@...ts.infradead.org, linux-sound@...r.kernel.org,
 netdev@...r.kernel.org
Subject: Re: [PATCH v1 03/14] dt-bindings: arm: mediatek: mmsys: Add
 assigned-clocks/rates properties

Krzysztof,

On 8/21/25 3:43 AM, Krzysztof Kozlowski wrote:
> On Wed, Aug 20, 2025 at 02:12:51PM -0300, Ariel D'Alessandro wrote:
>> Current, the DT bindings for MediaTek mmsys controller is missing the
>> assigned-clocks and assigned-clocks-rates properties. Add these and
> 
> No, they do not miss them. I don't understand why you are adding these.

The reason I added these is due to the following check error:

$ make -j$(nproc) CHECK_DTBS=y mediatek/mt8173-elm.dtb
   DTC [C] arch/arm64/boot/dts/mediatek/mt8173-elm.dtb
[...]
arch/arm64/boot/dts/mediatek/mt8173-elm.dtb: syscon@...00000 
(mediatek,mt8173-mmsys): 'assigned-clock-rates', 'assigned-clocks' do 
not match any of the regexes: '^pinctrl-[0-9]+$'
	from schema $id: 
http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#

> 
>> update the example as well.
>>
>> Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@...labora.com>
>> ---
>>   .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 9 +++++++++
>>   1 file changed, 9 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
>> index 3f4262e93c789..d045d366eb8e2 100644
>> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
>> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
>> @@ -68,6 +68,12 @@ properties:
>>         of the power controller specified by phandle. See
>>         Documentation/devicetree/bindings/power/power-domain.yaml for details.
>>   
>> +  assigned-clocks:
>> +    maxItems: 1
>> +
>> +  assigned-clock-rates:
>> +    maxItems: 1
>> +
> 
> Drop both, completely redundant and not actually in the scope of the binding.

Ack. Will fix accordingly in v2 based on the discussion above.

Thanks!

-- 
Ariel D'Alessandro
Software Engineer

Collabora Ltd.
Platinum Building, St John's Innovation Park, Cambridge CB4 0DS, UK 
Registered in England & Wales, no. 5513718


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ