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Message-ID: <cb2a5c93-0643-4c6b-a97f-b947c9aad32c@oss.qualcomm.com>
Date: Fri, 12 Sep 2025 14:27:59 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Wasim Nazir <wasim.nazir@....qualcomm.com>,
Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Richard Cochran <richardcochran@...il.com>,
Bartosz Golaszewski <brgl@...ev.pl>
Cc: kernel@....qualcomm.com, linux-mmc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, netdev@...r.kernel.org,
linux-i2c@...r.kernel.org,
Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
Subject: Re: [PATCH v4 07/14] arm64: dts: qcom: lemans-evk: Enable PCIe
support
On 9/8/25 10:19 AM, Wasim Nazir wrote:
> From: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
>
> Enable PCIe0 and PCIe1 along with the respective phy-nodes.
>
> PCIe0 is routed to an m.2 E key connector on the mainboard for wifi
> attaches while PCIe1 routes to a standard PCIe x4 expansion slot.
>
> Signed-off-by: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
> Signed-off-by: Wasim Nazir <wasim.nazir@....qualcomm.com>
> ---
[...]
> + perst-pins {
> + pins = "gpio2";
> + function = "gpio";
> + drive-strength = <2>;
> + bias-pull-down;
> + };
Pulling down an active-low pin is a bad idea
Konrad
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