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Message-ID: <175789589955.2309369.4610960260845760288.robh@kernel.org>
Date: Sun, 14 Sep 2025 19:25:00 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Biju Das <biju.das.jz@...renesas.com>,
	Philipp Zabel <p.zabel@...gutronix.de>,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	netdev@...r.kernel.org,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Paolo Abeni <pabeni@...hat.com>,
	Clément Léger <clement.leger@...tlin.com>,
	Wolfram Sang <wsa+renesas@...g-engineering.com>,
	Russell King <linux@...linux.org.uk>,
	"David S. Miller" <davem@...emloft.net>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Conor Dooley <conor+dt@...nel.org>,
	Eric Dumazet <edumazet@...gle.com>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
	linux-renesas-soc@...r.kernel.org,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Jakub Kicinski <kuba@...nel.org>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
	Magnus Damm <magnus.damm@...il.com>
Subject: Re: [PATCH net-next v3 1/9] dt-bindings: net: pcs:
 renesas,rzn1-miic: Add RZ/T2H and RZ/N2H support


On Wed, 10 Sep 2025 21:41:22 +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> 
> Add device tree binding support for RZ/T2H and RZ/N2H SoCs to the
> existing RZ/N1 MIIC converter binding. These SoCs share similar MIIC
> functionality but have architectural differences that require schema
> updates.
> 
> Add new compatible strings "renesas,r9a09g077-miic" for RZ/T2H and
> "renesas,r9a09g087-miic" for RZ/N2H, with the latter falling back to
> the RZ/T2H variant. The new SoCs require reset support with two reset
> lines for converter register reset and converter reset, which are not
> present on RZ/N1.
> 
> Update port configurations to accommodate the different architectures.
> RZ/N1 supports 5 ports numbered 1-5 with complex input mappings
> covering indices 0-13, while RZ/T2H and RZ/N2H support 4 ports
> numbered 0-3 with simplified input mappings covering indices 0-8.
> Extend the switch port configuration property to support value 0 for
> the new SoCs.
> 
> Add a new dt-bindings header file with media interface connection
> matrix constants that map GMAC, ESC, and ETHSW ports to numeric
> identifiers for use with RZ/T2H and RZ/N2H device trees.
> 
> Update DT schema validation to ensure proper port numbering and input
> mappings per SoC variant.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> Tested-by: Wolfram Sang <wsa+renesas@...g-engineering.com>
> ---
> v2->v3:
> - Added Tested-by tag.
> 
> v1->v2:
> - Dropped regx in title and description.
> - As done for other IPs used T2H compatible as a fallback for N2H.
> - Renamed pcs-rzt2h-miic.h -> renesas,r9a09g077-pcs-miic.h
> - Added matrix table in the new header file.
> - Corrected the resets check for RZ/N1.
> - Updated the commit message.
> ---
>  .../bindings/net/pcs/renesas,rzn1-miic.yaml   | 177 +++++++++++++-----
>  .../net/renesas,r9a09g077-pcs-miic.h          |  36 ++++
>  2 files changed, 165 insertions(+), 48 deletions(-)
>  create mode 100644 include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h
> 

Reviewed-by: Rob Herring (Arm) <robh@...nel.org>


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