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Message-ID: <aMkKS6m0QEOWz7md@hu-wasimn-hyd.qualcomm.com>
Date: Tue, 16 Sep 2025 12:27:15 +0530
From: Wasim Nazir <wasim.nazir@....qualcomm.com>
To: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>,
Bjorn Andersson <andersson@...nel.org>
Cc: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Richard Cochran <richardcochran@...il.com>,
Bartosz Golaszewski <brgl@...ev.pl>, kernel@....qualcomm.com,
linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
netdev@...r.kernel.org, linux-i2c@...r.kernel.org
Subject: Re: [PATCH v4 07/14] arm64: dts: qcom: lemans-evk: Enable PCIe
support
On Mon, Sep 15, 2025 at 04:03:14PM +0530, Sushrut Shree Trivedi wrote:
>
> On 9/12/2025 5:57 PM, Konrad Dybcio wrote:
> > On 9/8/25 10:19 AM, Wasim Nazir wrote:
> > > From: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
> > >
> > > Enable PCIe0 and PCIe1 along with the respective phy-nodes.
> > >
> > > PCIe0 is routed to an m.2 E key connector on the mainboard for wifi
> > > attaches while PCIe1 routes to a standard PCIe x4 expansion slot.
> > >
> > > Signed-off-by: Sushrut Shree Trivedi <quic_sushruts@...cinc.com>
> > > Signed-off-by: Wasim Nazir <wasim.nazir@....qualcomm.com>
> > > ---
> > [...]
> >
> > > + perst-pins {
> > > + pins = "gpio2";
> > > + function = "gpio";
> > > + drive-strength = <2>;
> > > + bias-pull-down;
> > > + };
> > Pulling down an active-low pin is a bad idea
>
> Ack, we should do pull up.
> we took reference from the previous targets which seems to be wrong.
> we will make it pull up.
>
> Bjorn,
> can you make this change while applying or shall we send new series.
>
Let me send another series with this change, rebasing on top of audio
change that is part of next.
--
Regards,
Wasim
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