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Message-ID: <7f1d9289-4102-4db9-a2bb-ff270e8871b7@lunn.ch>
Date: Thu, 18 Sep 2025 17:04:55 +0200
From: Andrew Lunn <andrew@...n.ch>
To: David Jander <david@...tonic.nl>
Cc: Jonas Rebmann <jre@...gutronix.de>, Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>,
Shengjiu Wang <shengjiu.wang@....com>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Vladimir Oltean <vladimir.oltean@....com>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-sound@...r.kernel.org, imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
Lucas Stach <l.stach@...gutronix.de>,
Oleksij Rempel <o.rempel@...gutronix.de>
Subject: Re: [PATCH v2 3/3] arm64: dts: add Protonic PRT8ML board
> Yes, unfortunately the SJA1105Q does not support PAUSE frames, and the i.MX8MP
> FEC isn't able to sustain 1000Mbps (only about 400ish) due to insufficient
> internal bus bandwidth. It will generate PAUSE frames, but the SJA1105Q
> ignores these, leading to packet loss, which is obviously worse than
> restricting this link to 100Mbps. Ironically both chips are from the same
> manufacturer, yet are incompatible in this regard.
Thanks for the explanation. Maybe add a comment that the bandwidth is
limited due to the lack of flow control resulting in packet loss in
the FEC.
Anything which looks odd deserves a comment, otherwise somebody will
question it....
Andrew
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