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Message-ID: <76611a9c-4c53-40a2-96c1-e1cf5b211611@nvidia.com>
Date: Thu, 18 Sep 2025 18:16:14 +0300
From: Carolina Jubran <cjubran@...dia.com>
To: Jakub Kicinski <kuba@...nel.org>
Cc: Vadim Fedorenko <vadim.fedorenko@...ux.dev>, Andrew Lunn
 <andrew@...n.ch>, Michael Chan <michael.chan@...adcom.com>,
 Pavan Chebbi <pavan.chebbi@...adcom.com>, Tariq Toukan <tariqt@...dia.com>,
 Gal Pressman <gal@...dia.com>, intel-wired-lan@...ts.osuosl.org,
 Donald Hunter <donald.hunter@...il.com>, Paolo Abeni <pabeni@...hat.com>,
 Simon Horman <horms@...nel.org>, netdev@...r.kernel.org,
 Yael Chemla <ychemla@...dia.com>, Dragos Tatulea <dtatulea@...dia.com>
Subject: Re: [PATCH net-next v3 3/4] net/mlx5e: Add logic to read RS-FEC
 histogram bin ranges from PPHCR


On 18/09/2025 17:35, Jakub Kicinski wrote:
> On Thu, 18 Sep 2025 17:25:40 +0300 Carolina Jubran wrote:
>>> why does MLX5E_FEC_RS_HIST_MAX exist?
>>> We care that bins_cnt <= ETHTOOL_FEC_HIST_MAX - 1
>>> or is there something in the interface that hardcodes 16?
>> My intention was to keep mlx5 capped at 16 even if ethtool raises its max.
>> We’ll only increase this once we know the device should expose more than 16.
>> Since our HW has internal modes that can report more than 16 bins, this
>> ensures we don’t accidentally expose them if ethtool increases its max.
> But why?

Because currently those modes shouldn't be exposed for ethernet.


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