netdev - Re: [PATCH net-next v3 3/4] net/mlx5e: Add logic to read RS-FEC histogram bin ranges from PPHCR

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Message-ID: <f84efe86-098f-4783-85af-4289f62804e9@nvidia.com>
Date: Thu, 18 Sep 2025 22:41:38 +0300
From: Carolina Jubran <cjubran@...dia.com>
To: Jakub Kicinski <kuba@...nel.org>
Cc: Vadim Fedorenko <vadim.fedorenko@...ux.dev>, Andrew Lunn
 <andrew@...n.ch>, Michael Chan <michael.chan@...adcom.com>,
 Pavan Chebbi <pavan.chebbi@...adcom.com>, Tariq Toukan <tariqt@...dia.com>,
 Gal Pressman <gal@...dia.com>, intel-wired-lan@...ts.osuosl.org,
 Donald Hunter <donald.hunter@...il.com>, Paolo Abeni <pabeni@...hat.com>,
 Simon Horman <horms@...nel.org>, netdev@...r.kernel.org,
 Yael Chemla <ychemla@...dia.com>, Dragos Tatulea <dtatulea@...dia.com>
Subject: Re: [PATCH net-next v3 3/4] net/mlx5e: Add logic to read RS-FEC
 histogram bin ranges from PPHCR


On 18/09/2025 18:40, Jakub Kicinski wrote:
> I understand that the modes should not be exposed.
> I don't get why this has anything to do with the number of bins.
> Does the FW hardcode that the non-Ethernet modes use bins >=16?
> When you say "internal modes that can report more than 16 bins"
> it sounds like it uses bins starting from 0, e.g. 0..31.

The FW hardcodes that Ethernet modes report up to 16 bins,
while non-Ethernet modes may report up to 19.
And yes, those modes use bins starting from 0, e.g. 0..18.