[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <175847361789.4354.2149769507345484400@lazor>
Date: Sun, 21 Sep 2025 09:53:37 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Laura Nao <laura.nao@...labora.com>, angelogioacchino.delregno@...labora.com, conor+dt@...nel.org, krzk+dt@...nel.org, matthias.bgg@...il.com, mturquette@...libre.com, p.zabel@...gutronix.de, richardcochran@...il.com, robh@...nel.org
Cc: guangjie.song@...iatek.com, wenst@...omium.org, linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org, kernel@...labora.com, Laura Nao <laura.nao@...labora.com>, NĂcolas F . R . A . Prado <nfraprado@...labora.com>
Subject: Re: [PATCH v6 07/27] clk: mediatek: clk-gate: Add ops for gates with HW voter
Quoting Laura Nao (2025-09-15 08:19:27)
> MT8196 use a HW voter for gate enable/disable control. Voting is
> performed using set/clr regs, with a status bit used to verify the vote
> state. Add new set of gate clock operations with support for voting via
> set/clr regs.
>
> Reviewed-by: NĂcolas F. R. A. Prado <nfraprado@...labora.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>
> Signed-off-by: Laura Nao <laura.nao@...labora.com>
> ---
Applied to clk-next
Powered by blists - more mailing lists